參數(shù)資料
型號: MC33065DW-H
廠商: MOTOROLA INC
元件分類: 穩(wěn)壓器
英文描述: HIGH PERFORMANCE DUAL CHANNEL CURRENT MODE CONTROLLERS
中文描述: 0.4 A DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: PLASTIC, SOP-16
文件頁數(shù): 9/15頁
文件大?。?/td> 494K
代理商: MC33065DW-H
MC34065 MC33065
9
MOTOROLA ANALOG IC DEVICE DATA
Undervoltage Lockout
Two Undervoltage Lockout comparators have been
incorporated to guarantee that the IC is fully functional
before the output stages are enabled. The positive power
supply terminal (VCC) and the reference output (Vref) are
each monitored by separate comparators. Each has built–in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The VCC comparator
upper and lower thresholds are 14 V and 10 V respectively.
The hysteresis and low startup current makes these devices
ideally suited to off–line converter applications where
efficient bootstrap startup techniques are required
(Figure 28). The Vref comparator disables the Drive Outputs
until the internal circuitry is functional. This comparator has
upper and lower thresholds of 3.6 V and 3.4 V. A 17 V zener
is connected as a shunt regulator from VCC to ground. Its
purpose is to protect the IC and power MOSFET gate from
excessive voltage that can occur during system startup. The
guaranteed minimum operating voltage after turn–on is 11 V.
Drive Outputs and Drive Ground
Each channel contains a single totem–pole output stage
that is specifically designed for direct drive of power
MOSFETs. The Drive Outputs are capable of up to
±
1.0 A
peak current with a typical rise and fall time of 28 ns with a
1.0 nF load. Internal circuitry has been added to keep the
outputs in a sinking mode whenever an Undervoltage
Lockout is active. This characteristic eliminates the need for
an external pull–down resistor. Cross–conduction current in
the totem–pole output stage has been minimized for high
speed operation, as shown in Figure 13. The average added
power due to cross–conduction with VCC = 15 V is only
60 mW at 500 kHz.
Although the Drive Outputs were optimized for MOSFETs,
they can easily supply the negative base current required by
bipolar NPN transistors for enhanced turn–off (Figure 25).
The outputs do not contain internal current limiting, therefore
an external series resistor may be required to prevent the
peak output current from exceeding the 1.0 A maximum
rating. The sink saturation (VOL) is less than 0.4 V at 100 mA.
A separate Drive Ground pin is provided and, with proper
implementation, will significantly reduce the level of switching
transient noise imposed on the control circuitry. This
becomes particularly useful when reducing the Ipk(max) clamp
level. Figure 23 shows the proper ground connections
required for current sensing power MOSFET applications.
Drive Output 2 Enable Pin
This input is used to enable Drive Output 2. Drive Output 1
can be used to control circuitry that must run continuously
such as volatile memory and the system clock, or a remote
controlled receiver, while Drive Output 2 controls the high
power circuitry that is occasionally turned off.
Reference
The 5.0 V bandgap reference is trimmed to
±
2.0%
tolerance at TJ = 25
°
C. The reference has short circuit
protection and is capable of providing in excess of 30 mA for
powering any additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards.
High frequency
circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout
should contain a ground plane with low current signal and
high current switch and output grounds returning on
separate paths back to the input filter capacitor. Ceramic
bypass capacitors (0.1
μ
F) connected directly to VCC and
Vref may be required depending upon circuit layout. This
provides a low impedance path for filtering the high
frequency noise. All high current loops should be kept as
short as possible using heavy copper runs to minimize
radiated EMI. The Error Amp compensation circuitry and the
converter output voltage–divider should be located close to
the IC and as far as possible from the power switch and
other noise generating components.
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