參數(shù)資料
型號: MC3303DR2G
廠商: ON Semiconductor
文件頁數(shù): 5/9頁
文件大?。?/td> 0K
描述: IC OPAMP QUAD DIFF INPUT 14SOIC
標準包裝: 1
放大器類型: 通用
電路數(shù): 4
轉(zhuǎn)換速率: 0.6 V/µs
增益帶寬積: 1MHz
電流 - 輸入偏壓: 200nA
電壓 - 輸入偏移: 2000µV
電流 - 電源: 2.8mA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 3 V ~ 36 V,±1.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOICN
包裝: 標準包裝
其它名稱: MC3303DR2GOSDKR
MC3403, MC3303
http://onsemi.com
5
CIRCUIT DESCRIPTION
Figure 2. Inverter Pulse Response
20
ms/DIV
5.0
V/DIV
The MC3403/3303 is made using four internally
compensated, twostage operational amplifiers. The first
stage of each consists of differential input device Q24 and
Q22 with input buffer transistors Q25 and Q21 and the
differential to single ended converter Q3 and Q4. The first
stage performs not only the first stage gain function but also
performs the level shifting and Transconductance reduction
functions. By reducing the Transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The Transconductance reduction is
accomplished by splitting the collectors of Q24 and Q22.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to singleended converter. The
second stage consists of a standard current source load
amplifier stage.
The output stage is unique because it allows the output to
swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation.
This is possible because Class AB operation is utilized.
Each amplifier is biased from an internal voltage regulator
which has a low temperature coefficient, thus giving each
amplifier good temperature characteristics as well as
excellent power supply rejection.
Figure 3. Sine Wave Response
Figure 4. Open Loop Frequency Response
A
OPEN
LOOP
VOL
TAGE
GAIN
(dB)
1.0
10
100
1.0 k
10 k
100 k
1.0 M
f, FREQUENCY (Hz)
-20
0
20
40
60
80
100
120
,LARGE
SIGNAL
VOL
50
ms/DIV
50
mV/DIV
0.5
V/DIV
AV = 100
*Note Class A B output stage produces distortion less sinewave.
VCC = 15 V
VEE = -15 V
TA = 25°C
V
O
,
OUTPUT
VOL
TAGE
(V
)
pp
Figure 5. Power Bandwidth
Figure 6. Output Swing versus Supply Voltage
f, FREQUENCY (Hz)
1.0 k
10 k
100 k
1.0 M
-5.0
0
5.0
10
15
20
25
30
TA = 25°C
O
+15 V
-15 V
10 k
VO
-
+
V O
0
2.0
4.0
6.0
8.0
10
12
14
16
18
20
VCC AND (VEE), POWER SUPPLY VOLTAGES (V)
0
20
30
10
TA = 25°C
,OUTPUT
VOL
TAGE
RANGE
(V
pp)
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