參數(shù)資料
型號(hào)： MC145706P
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Dual-Processor Supervisory Circuits with Power-Fail 8-MSOP -40 to 85
中文描述： LINE TRANSCEIVER, PDIP20
封裝： PLASTIC, DIP-20
文件頁數(shù)： 4/12頁
文件大?。?/td> 229K
代理商： MC145706P
MC145705
MC145706
MC145707
4
MOTOROLA
MAXIMUM RATINGS
(Voltage Polarities Referenced to GND)
Rating
Symbol
Value
Unit
DC Supply Voltage
VCC
VIR
– 0.5 to + 6.0
V
Input Voltage
Rx1 – Rx3 Inputs
DI1 – DI3 Inputs
VSS – 15 to VDD+ 15
0.5 to VCC+ 15
V
DC Current per Pin
I
±
100
mA
Power Dissipation
PD
TA
Tstg
1
W
Operating Temperature Range
– 40 to + 85
°
C
Storage Temperature Range
– 85 to + 150
°
C
RECOMMENDED OPERATING LIMITS
Parameter
Symbol
Min
Typ
Max
Unit
Power Supply
VCC
TA
4.5
5
5.5
V
Operating Temperature Range
– 40
—
85
°
C
DC ELECTRICAL CHARACTERISTICS
(Voltage polarities referenced to GND = 0 V; C1 – C4 = 10
μ
F; TA = – 40 to + 85
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
DC Power Supply
VCC
ICC
4.5
5
5.5
V
Quiescent Supply Current (Output Unloaded, Input Low)
—
1.7
3.5
mA
Quiescent Supply Current (Standby Mode) (Output Unloaded, Input Open)
ICC(STB)
VIL
VIH
—
< 10
20
μ
A
Control Signal Input Voltage (STB, TxEN)
Logic Low
Logic High
—
VCC – 0.5
—
—
0.5
—
V
Control Signal Input Current
Logic Low (TxEN)
Logic High (STB)
IIL
IIH
—
—
—
—
– 10
10
μ
A
Charge Pumps Output Voltage (C1, C2, C3, C4 = 10
μ
F)
Output Voltage (VDD)
Iload = 0 mA
Iload = 5 mA
Iload = 10 mA
Iload = 0 mA
Iload = 5 mA
Iload = 10 mA
VDD
8.5
7.5
6.0
10.0
9.5
9.0
11
—
—
V
Output Voltage (VSS)
VSS
– 8.5
– 7.5
– 6.0
– 10.0
– 9.2
– 8.6
– 11
—
—
RECEIVER ELECTRICAL SPECIFICATIONS
(Voltage polarities referenced to GND = 0 V; VCC = + 5 V
±
10%; C1 – C4 = 10
μ
F; TA = – 40 to + 85
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Input Turn–On Threshold (VDO1 – DO3 = VOL)
Input Turn–Off Threshold (VDO1 – DO3 = VOH)
Input Threshold Hysteresis (Von = Voff)
Input Resistance
Rx1 – Rx3
Von
Voff
Vhys
Rin
VOH
1.35
1.8
2.35
V
Rx1 – Rx3
0.75
1
1.25
V
Rx1 – Rx3
0.6
0.8
—
V
3
5.4
7
k
High–Level Output Voltage (DO1 – DO3)
VRx1 – Rx3 = – 3 to – 25 V
Iout = – 20
μ
A
Iout = – 1 mA
VCC – 0.1
VCC – 0.7
—
4.3
—
—
V
Low–Level Output Voltage (DO1 – DO3)
VRx1 – Rx3 = + 3 to + 25 V
Iout = + 20
μ
A
Iout = + 1.6 mA
VOL
—
—
0.01
0.5
0.1
0.7
V
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, precau-
tions must be taken to avoid applications of any
voltage higher than maximum rated voltages to
this high–impedance circuit. For proper opera-
tion, it is recommended that the voltage at
the DI and DO pins be constrained to the range
GND
≤
VDI
≤
VDD and GND
≤
VDO
≤
VCC.
Also, the voltage at the Rx pin should be
constrained to (VSS – 15 V)
≤
VRx1 – Rx3
≤
(VDD + 15 V), and Tx should be constrained
to VSS
≤
VTx1 – Tx3
≤
VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., GND or
VCC for DI, and GND for Rx).
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