參數(shù)資料
型號(hào): MC14569BDW
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter
中文描述: 4000/14000/40000 SERIES, ASYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
封裝: PLASTIC, SOIC-16
文件頁(yè)數(shù): 8/12頁(yè)
文件大?。?/td> 323K
代理商: MC14569BDW
MOTOROLA CMOS LOGIC DATA
MC14569B
8
Table 5. Mode Controls
(CTL1 = High, CTL2 = High, Cascade Feedback = High)
Preset Values
Divide Ratio
Comments
P7
P6
P5
P4
P3
P2
P1
P0
Zero
Detect
Q
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
100
X
2
3
100
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
80
Max Count
illegal state
Min Count
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
9
10
0
0
1
1
0
0
0
0
30
0
1
0
0
0
0
0
0
40
0
1
0
1
0
0
0
0
50
0
1
1
1
0
0
0
0
70
1
0
0
0
0
0
0
0
80
Q Output Active
1
0
0
1
0
0
0
0
90
90
1
0
0
1
1
0
0
1
99
99
80
40
20
10
8
4
2
1
Bit Value
Counter #2
BCD
Counter #1
BCD
Counting
Sequence
X = No Output (Always Low)
TIMING DIAGRAM MC14569B
CLOCK
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DIVIDE
BY 2
DIVIDE
BY 3
DIVIDE
BY 4
DIVIDE
BY 12
ZERO
DETECT
OUTPUT
相關(guān)PDF資料
PDF描述
MC14569BCL Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter
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