
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 9
1
Publication Order Number:
MC14553B/D
MC14553B
3-Digit BCD Counter
The MC14553B 3digit BCD counter consists of 3 negative edge
triggered BCD counters that are cascaded synchronously. A quad latch
at the output of each counter permits storage of any given count. The
information is then time division multiplexed, providing one BCD
number or digit at a time. Digit select outputs provide display control.
All outputs are TTL compatible.
An onchip oscillator provides the lowfrequency scanning clock
which drives the multiplexer output selector.
This device is used in instrumentation counters, clock displays,
digital panel meters, and as a building block for general logic
applications.
Features
TTL Compatible Outputs
OnChip Oscillator
Cascadable
Clock Disable Input
Pulse Shaping Permits Very Slow Rise Times on Input Clock
Output Latches
Master Reset
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
0.5 to +18.0
V
Input or Output Voltage Range
(DC or Transient)
Vin,
Vout
0.5 to VDD
+ 0.5
V
Input Current (DC or Transient) per Pin
Iin
±10
mA
Output Current (DC or Transient) per Pin
Iout
+20
mA
Power Dissipation, per Package (Note
1)PD
500
mW
Ambient Temperature Range
TA
55 to +125
°C
Storage Temperature Range
Tstg
65 to +150
°C
Lead Temperature (8Second Soldering)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
Device
Package
Shipping
ORDERING INFORMATION
http://onsemi.com
MC14553BCPG
PDIP16
(PbFree)
500 Units / Rail
MARKING
DIAGRAMS
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G
= PbFree Package
Figure 1. Block Diagram
12
10
11
13
9
7
6
5
14
2
1
15
VDD = PIN 16
VSS = PIN 8
43
CLOCK
LE
DIS
MR
Q0
Q1
Q2
Q3
O.F.
DS1
DS2
DS3
CIA
CIB
PDIP16
P SUFFIX
CASE 648
16
1
MC14553BCP
AWLYYWWG
1