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參數(shù)資料
| 型號： | MC14519BCP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Pin High Frequency 4-Amp Sink Synchronous MOSFET Driver 8-SOIC -40 to 125 |
| 中文描述： | 4000/14000/40000 SERIES, QUAD 2-INPUT XNOR GATE, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 201K |
| 代理商： | MC14519BCP |
MOTOROLA CMOS LOGIC DATA
3
MC14519B
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
Propagation Delay Time
tPLH, tPHL = (1.7 ns/pF) CL + 165 ns
tPLH, tPHL = (0.66 ns/pF) CL + 82
tPLH, tPHL = (0.5 ns/pF) CL + 65 ns
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
tTLH,
tTHL
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
tPLH,
tPHL
5.0
10
15
—
—
—
250
115
90
500
225
165
ns
Figure 1. Dynamic Power Dissipation Test Circuit and Waveform
+VDD
Z0
Z1
Z2
Z3
A
B
X0
Y0
X1
Y1
X2
Y2
X3
Y3
CL
CL
CL
CL
VDD
VSS
ISS
Vin
500
μ
F
PULSE
GENERATOR
20 ns
20 ns
VDD
VSS
90%
10%
Vin
50% DUTY CYCLE
Figure 2. Switching Time Test Circuit and Waveforms
VDD
VDD
VSS
Z0
Z1
Z2
Z3
A
B
X0
Y0
X1
Y1
X2
Y2
X3
Y3
CL
CL
CL
CL
OUTPUTS
20 ns
20 ns
VDD
VSS
VOH
VOL
VOH
VOL
OUTPUT
OUTPUT
INPUT
90%
50%
10%
10%
50%
50%
tPHL
tPHL
tPLH
tPLH
tTHL
tTLH
PULSE
GENERATOR
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