SWITCHING CHARACTERISTICS (Note 5) (CL
參數(shù)資料
型號: MC14516BDR2
廠商: ON Semiconductor
文件頁數(shù): 5/10頁
文件大?。?/td> 0K
描述: IC COUNTER BINARY UP/DOWN 16SOIC
產(chǎn)品變化通告: Product Obsolescence 11/Feb/2009
標(biāo)準(zhǔn)包裝: 2,500
系列: 4000B
邏輯類型: 二進(jìn)制計數(shù)器
方向: 上,下
元件數(shù): 1
每個元件的位元數(shù): 4
復(fù)位: 異步
計時: 同步
計數(shù)速率: 8MHz
觸發(fā)器類型: 正邊沿
電源電壓: 3 V ~ 18 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
MC14516B
http://onsemi.com
4
SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C)
Characteristic
Symbol
VDD
All Types
Unit
Min
Typ (Note 6)
Max
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
tTLH,
tTHL
5.0
10
15
100
50
40
200
100
80
ns
Propagation Delay Time
Clock to Q
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Clock to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Carry In to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Preset or Reset to Q
tPLH, tPHL = (1.7 ns/pF) CL + 230 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 75 ns
Preset or Reset to Carry Out
tPLH, tPHL = (1.7 ns/pF) CL + 465 ns
tPLH, tPHL = (0.66 ns/pF) CL + 192 ns
tPLH, tPHL = (0.5 ns/pF) CL + 125 ns
tPLH,
tPHL
5.0
10
15
315
130
100
630
260
200
ns
tPLH,
tPHL
5.0
10
15
315
130
100
630
260
200
ns
tPLH,
tPHL
5.0
10
15
180
80
60
360
160
120
ns
tPLH,
tPHL
5.0
10
15
315
130
100
630
360
200
ns
tPLH,
tPHL
5.0
10
15
550
225
150
1100
450
300
ns
Reset Pulse Width
tw
5.0
10
15
380
200
160
190
100
80
ns
Clock Pulse Width
tWH
5.0
10
15
350
170
140
200
100
75
ns
Clock Pulse Frequency
fcl
5.0
10
15
3.0
6.0
8.0
1.5
3.0
4.0
MHz
Preset or Reset Removal Time
The Preset or Reset signal must be low prior to a
positivegoing transition of the clock.
trem
5.0
10
15
650
230
180
325
115
90
ns
Clock Rise and Fall Time
tTLH,
tTHL
5.0
10
15
15
5
4
ms
Setup Time
Carry In to Clock
tsu
5.0
10
15
260
120
100
130
60
50
ns
Hold Time
Clock to Carry In
th
5.0
10
15
0
20
– 60
– 20
0
ns
Setup Time
Up/Down to Clock
tsu
5.0
10
15
500
200
150
250
100
75
ns
Hold Time
Clock to Up/Down
th
5.0
10
15
– 70
– 10
0
– 160
– 60
– 40
ns
Setup Time
Pn to PE
tsu
5.0
10
15
– 40
– 30
– 25
– 120
– 70
– 50
ns
Hold Time
PE to Pn
th
5.0
10
15
480
420
240
210
ns
Preset Enable Pulse Width
tWH
5.0
10
15
200
100
80
100
50
40
ns
5. The formulas given are for the typical characteristics only at 25
_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an Indication of the IC’s potential performance.
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