參數(shù)資料
型號: MC14515BDWR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: 4-Bit Transparent Latch/4-to-16 Line Decoder
中文描述: 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO24
封裝: SOIC-24
文件頁數(shù): 7/8頁
文件大?。?/td> 254K
代理商: MC14515BDWR2
MOTOROLA CMOS LOGIC DATA
391
MC14514B MC14515B
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC DIP PACKAGE
CASE 709–02
ISSUE C
L SUFFIX
CERAMIC DIP PACKAGE
CASE 623–05
ISSUE M
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO
SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
31.37
13.72
3.94
0.36
1.02
MAX
32.13
14.22
5.08
0.56
1.52
MIN
1.235
0.540
0.155
0.014
0.040
0.100 BSC
0.065
0.008
0.115
0.600 BSC
0
0.020
MAX
1.265
0.560
0.200
0.022
0.060
INCHES
MILLIMETERS
2.54 BSC
1.65
0.20
2.92
15.24 BSC
0
0.51
2.03
0.38
3.43
0.080
0.015
0.135
15
1.02
15
0.040
1
12
13
24
B
H
A
F
D
G
K
SEATING
N
C
M
J
L
NOTES:
1. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
2. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION (WHEN FORMED
PARALLEL).
1
12
24
13
B
A
SEATING
F
D
G
K
N
C
M
J
L
DIM
A
B
C
D
F
G
J
K
L
M
N
MIN
31.24
12.70
4.06
0.41
1.27
MAX
32.77
15.49
5.59
0.51
1.52
MIN
1.230
0.500
0.160
0.016
0.050
0.100 BSC
0.008
0.125
0.600 BSC
0
0.020
MAX
1.290
0.610
0.220
0.020
0.060
INCHES
MILLIMETERS
2.54 BSC
0.20
3.18
15.24 BSC
0
0.51
0.30
4.06
0.012
0.160
15
1.27
15
0.050
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