
Semiconductor Components Industries, LLC, 2005
August, 2005 Rev. 6
1
Publication Order Number:
MC14504B/D
MC14504B
Hex Level Shifter for TTL to
CMOS or CMOS to CMOS
The MC14504B is a hex noninverting level shifter using CMOS
technology. The level shifter will shift a TTL signal to CMOS logic
levels for any CMOS supply voltage between 5 and 15 volts. A control
input also allows interface from CMOS to CMOS at one logic level to
another logic level: Either up or down level translating is
accomplished by selection of power supply levels V
DD
and V
CC
. The
V
CC
level sets the input signal levels while V
DD
selects the output
voltage levels.
Features
UP Translates from a Low to a High Voltage or DOWN Translates
from a High to a Low Voltage
Input Threshold Can Be Shifted for TTL Compatibility
No Sequencing Required on Power Supplies or Inputs for Power Up
or Power Down
3 to 18 Vdc Operation for V
DD
and V
CC
Diode Protected Inputs to V
SS
Capable of Driving Two LowPower TTL Loads or One LowPower
Schottky TTL Load Over the Rated Temperature Range
PbFree Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
Parameter
Value
Unit
V
CC
V
DD
V
in
DC Supply Voltage Range
0.5 to +18.0
V
DC Supply Voltage Range
0.5 to +18.0
V
Input Voltage Range
(DC or Transient)
0.5 to +18.0
V
V
out
Output Voltage Range
(DC or Transient)
0.5 to V
DD
+ 0.5
V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
±
10
mA
P
D
Power Dissipation, per Package
(Note 1)
500
mW
T
A
T
stg
T
L
Ambient Temperature Range
55 to +125
°
C
°
C
°
C
Storage Temperature Range
65 to +150
Lead Temperature
(8Second Soldering)
260
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIP16
P SUFFIX
CASE 648
MC14504BCP
AWLYYWWG
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
14504BG
AWLYWW
14
504B
ALYW
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Indicator
SOEIAJ16
F SUFFIX
CASE 966
MC14504B
ALYWG
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
16
1
1
16
1
16
1
16
*For additional information on our PbFree strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.