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參數(shù)資料
| 型號： | MC145004FU |
| 廠商： | MOTOROLA INC |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | 128 Segment LCD Drivers |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, PQFP52 |
| 封裝： | QFP-52 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 228K |
| 代理商： | MC145004FU |
Product Preview
CMOS
The MC145003/5004 are 128–segment, multiplexed–by–four LCD Drivers.
The two devices are functionally the same except for their data input proto-
cols. The MC145003 uses an SPI data input protocol which is directly com-
patible with that of the MC6805 family of microcomputers. Using a minimal
amount of software (see example), the device may be interfaced to the
MC68HCXX product families. The MC145004 has a IIC interface and has es-
sentially the same protocol, except that the device sends an acknowledge bit
back to the transmitter after each eight–bit byte is received. MC145004 also
has a “read mode”, whereby data sent to the device may be retrieved via the
IIC bus.
The MC145003/MC145004 drives the liquid–crystal displays in a multi-
plexed–by–four configuration. The device accepts data from a microproces-
sor or other serial data source to drive one segment per bit. The chip does not
have a decoder, allowing for the flexibility of formatting the segment data
externally.
Devices are independently addressable via a two–wire (or three–wire)
communication link which can be common with other MC145003/MC145004
and/or other peripheral devices.
Drives 128 Segments Per Package
Devices May Be Cascaded for Larger LCD Applications
May Be Used with the Following LCDs: Segmented Alphanumeric,
Bar Graph, Dot Matrix, Custom
Quiscent Supply Current: 85
μ
A @ 2.8 V VDD
Operating Voltage Range: 2.8 to 5.5 V
Operating Temperature Range: –40 to 85
°
C
Separate Access to LCD Drive Section’s Supply Voltage to Allow for
Temperature Compensation
See Application Notes AN1066 and AN442
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
Order this document
by MC145003/D
SEMICONDUCTOR TECHNICAL DATA
FP32
FP31
FP30
FP29
FP28
FP27
FP26
FP25
FP24
FP23
FP22
FP21
FP20
QFP
FU
SUFFIX
CASE 848B
ORDERING INFORMATION
MC145003FU
MC145004FU
QFP
QFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
PIN ASSIGNMENT
52 51 50 49 48 47 46 45 44 43 42 41 40
N
F
F
F
F
F
F
F
F
F
N
VS
VL
N
O
O
B
B
A
A
A
E
N
39
38
37
36
35
34
33
32
31
30
29
28
27
Din
DCLK
FS
FP1
FP2
FP3
FP4
FP5
FP6
FP7
FP8
FP9
FP10
VD
B
B
NC = NO CONNECTION
1
52
BLOCK DIAGRAM
128–BIT LATCH
FS
LCD VOLTAGE
WAVEFORM
AND TIMING
GENERATOR
FRAME
SYNC
GENERATOR
OSCILLATOR
128–BIT SHIFT REGISTER
OSC2
OSC1
POR
DRIVERS
DRIVERS
128 – 32
MULTIPLEX
D
C
A2
A0
A1
ENB
DCLK
Din
VLCD
BP1–BP4
FP1–FP32
Motorola, Inc. 1994
REV 1
12/94
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