參數(shù)資料
型號: MC14069UBCL
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: CERAMIC CHIP/MIL-PRF-55681
中文描述: 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP14
封裝: CERAMIC, DIP-14
文件頁數(shù): 1/4頁
文件大小: 167K
代理商: MC14069UBCL
MOTOROLA CMOS LOGIC DATA
1
MC14069UB
The MC14069UB hex inverter is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure.
These inverters find primary use where low power dissipation and/or high
noise immunity is desired. Each of the six inverters is a single stage to
minimize propagation delays.
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
Triple Diode Protection on All Inputs (see Page 5–2)
Pin–for–Pin Replacement for CD4069UB
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
Parameter
VDD
DC Supply Voltage
Vin, Vout
Input or Output Voltage (DC or Transient)
Iin, Iout
Input or Output Current (DC or Transient),
Value
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
±
10
Unit
V
V
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
CIRCUIT SCHEMATIC
(1/6 OF CIRCUIT SHOWN)
LOGIC DIAGRAM
13
11
9
5
3
1
12
10
8
6
4
2
VDD = PIN 14
VSS = PIN 7
VDD
VSS
OUTPUT
INPUT*
* Double diode protection on all
inputs not shown.
Figure 1. Switching Time Test Circuit and Waveforms
PULSE
GENERATOR
VDD
14
VSS
7
INPUT
OUTPUT
CL
20 ns
20 ns
VDD
VSS
VOH
VOL
tTHL
tTLH
OUTPUT
INPUT
tPHL
tPLH
90%
50%
10%
90%
50%
10%
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 632
ORDERING INFORMATION
MC14XXXUBCP
MC14XXXUBCL
MC14XXXUBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
OUT 5
IN 5
OUT 6
IN 6
VDD
OUT 4
IN 4
OUT 2
IN 2
OUT 1
IN 1
VSS
OUT 3
IN 3
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