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參數(shù)資料
| 型號(hào)： | MC14042BCL |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | QUAD TRANSPARENT LATCH |
| 中文描述： | 4000/14000/40000 SERIES, HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 213K |
| 代理商： | MC14042BCL |
MOTOROLA CMOS LOGIC DATA
MC14042B
156
The MC14042B Quad Transparent Latch is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Each latch has a separate data input, but all four
latches share a common clock. The clock polarity (high or low) used to
strobe data through the latches can be reversed using the polarity input.
Information present at the data input is transferred to outputs Q and Q during
the clock level which is determined by the polarity input. When the polarity
input is in the logic “0” state, data is transferred during the low clock level,
and when the polarity input is in the logic “1” state the transfer occurs during
the high clock level.
Buffered Data Inputs
Common Clock
Clock Polarity Control
Q and Q Outputs
Double Diode Input Protection
Supply Voltage Range = 3.0 Vdc to 1 8 Vdc
Schottky TTL Load Over the Rated Temperature Range
±
10
Input or Output Current (DC or Transient),
per Pin
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
LOGIC DIAGRAM
CLOCK
POLARITY
VDD = PIN 16
VSS = PIN 8
5
6
4
7
13
14
D3
D2
D1
D0
LATCH
1
LATCH
2
LATCH
3
LATCH
4
Q2
Q3
Q3
Q2
Q1
Q1
Q0
Q0
12
2
3
10
9
11
1
15
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
PIN ASSIGNMENT
TRUTH TABLE
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q2
D2
D3
Q3
VDD
Q1
Q1
Q2
D0
Q0
Q0
Q3
VSS
D1
POLARITY
CLOCK
Clock
0
1
1
0
Polarity
0
0
1
1
Q
Data
Latch
Data
Latch
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC14042BCP | 功能描述:閉鎖 3-18V Quad RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MC14042BCPG | 功能描述:閉鎖 3-18V Quad Transparent RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MC14042BD | 功能描述:閉鎖 3-18V Quad RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MC14042BDG | 功能描述:閉鎖 3-18V Quad Transparent RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| MC14042BDR2 | 功能描述:閉鎖 3-18V Quad RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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