參數(shù)資料
型號: MC14013BCP
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual Type D Flip-Flop
中文描述: 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
封裝: PLASTIC, DIP-14
文件頁數(shù): 1/6頁
文件大?。?/td> 210K
代理商: MC14013BCP
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
45
MC14013B
!
The MC14013B dual type D flip–flop is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R),
and Clock (C) inputs and complementary outputs (Q and Q). These devices
may be used as shift register elements or as type T flip–flops for counter and
toggle applications.
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge–Clocked Flip–Flop Design
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going edge
of the clock pulse
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
Parameter
VDD
DC Supply Voltage
Vin, Vout
Input or Output Voltage (DC or Transient)
lin, lout
Input or Output Current (DC or Transient),
Value
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
±
10
Unit
V
V
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
TRUTH TABLE
Inputs
Outputs
Clock
Data
Reset
Set
Q
Q
0
0
0
0
1
1
0
0
1
0
X
0
0
Q
Q
X
X
1
0
0
1
X
X
0
1
1
0
X
X
1
1
1
1
X = Don’t Care
= Level Change
No
Change
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 632
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
BLOCK DIAGRAM
10
11
9
8
4
3
5
6
12
13
2
1
S
S
R
R
D
C
D
C
Q
Q
Q
Q
VDD = PIN 14
VSS = PIN 7
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