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| 型號(hào)： | MC13109 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Universal Cordless Telephone Subsystem IC |
| 中文描述： | 通用無(wú)繩電話子系統(tǒng)集成電路 |
| 文件頁(yè)數(shù)： | 21/28頁(yè) |
| 文件大?。?/td> | 395K |
| 代理商： | MC13109 |
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MC13109
21
MOTOROLA ANALOG IC DEVICE DATA
“Clk Out” Divider Programming
The “Clk Out” pin is derived from the 2nd local oscillator
and can be used to drive a microprocessor, thereby reducing
the number of crystals required. Figure 23 shows the
relationship between the crystal frequency and the clock
output for different divider values. Figure 24 shows the “Clk
Out” register bit values.
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Figure 24. Clock Output Divider
Crystal
Crystal
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Clk Out
á
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Clk Out
á
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Clk Out
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MPU “Clk Out“ Power–Up Default Divider Value
The power–up default divider value is “divide by 10”. This
provides an MPU clock of about 1.0 MHz after initial
power–up. The reason for choosing this relatively low clock
frequency after intial power–up is that some microprocessors
that operate down to a 2.0 V power supply have a maximum
clock frequency fo 1.0 MHz. After initial power–up, the MPU
can change the clock divider value to set the clock to the
desired operating frequency. Special care has been taken in
the design of the clock divider to ensure that the transition
between one clock divider value and another is “smooth”
(i.e., there will be no narrow clock pulses to disturb the MPU).
MPU “Clk Out” Radiated Noise on Circuit Board
The clock line running between the MC13109 and the
microprocessor has the potential to radiate noise which can
cause problems in the system especially if the clock is a
square wave digital signal with large high frequency
harmonics. In order to minimize radiated noise, a 1.0 k
resistor is included on–chip in–series with the “Clk Out” output
driver. A small capacitor can be connected to the “Clk Out” line
on the PCB to form a single pole low pass filter. This filter will
significantly reduce noise radiated from the “Clk Out” line.
Volume Control
The volume control can be programmed in 2.0 dB gain
steps from –14 dB to +16 dB. The power–up default value is
0 dB.
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Bit #3
0
0
0
1
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1
Bit #2
0
0
1
1
1
Bit #1
0
1
0
1
0
Bit #0
0
1
2
7
14
Control #
–14 dB
–12 dB
–10 dB
0 dB
3
13
Amount
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0
0
1
1
0
1
1
4
–8.0 dB
12 dB
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0
1
0
0
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14 dB
0
–6.0 dB
0
0
0
1
0
1
5
–4.0 dB
0
1
1
0
6
–2.0 dB
0
0
0
0
8
2.0 dB
1
1
0
0
1
9
4.0 dB
1
0
1
0
10
6.0 dB
1
0
1
1
11
8.0 dB
1
1
0
0
12
10 dB
1
1
1
1
1
1
15
16 dB
Gain Control Register
The gain control register contains bits which control the
Carrier Detect threshold. Operation of these latch bits are
explained in Figures 26 and 27.
Figure 26. Gain Control Latch Bits
5–Bit CD Threshold Control
MSB
LSB
相關(guān)PDF資料 |
PDF描述 |
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| MC13109FB | Universal Cordless Telephone Subsystem IC |
| MC13109FTA | Universal Cordless Telephone Subsystem IC |
| MC13111B | Narrowband FM IF Receiver(窄頻帶FM IF 接收器) |
| MC13110B | Narrowband FM IF Receiver(窄頻帶FM IF 接收器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC13109A | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL CORDLESS TELEPHONE SUBSYSTEM IC |
| MC13109AFB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL CORDLESS TELEPHONE SUBSYSTEM IC |
| MC13109AFTA | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:UNIVERSAL CORDLESS TELEPHONE SUBSYSTEM IC |
| MC13109FB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Universal Cordless Telephone Subsystem IC |
| MC13109FTA | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Universal Cordless Telephone Subsystem IC |
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