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參數(shù)資料
| 型號(hào)： | MC12439FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | XO, clock |
| 英文描述： | COVER, PSU; Length / Height, external:34.8mm; Width, external:78.8mm; Depth, external:120mm; Material:Aluminium; Series:PBM25 RoHS Compliant: Yes |
| 中文描述： | 800 MHz, OTHER CLOCK GENERATOR, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 131K |
| 代理商： | MC12439FN |
MC12439
TIMING SOLUTIONS
BR1333 — Rev 6
3
MOTOROLA
Figure 2. MC12439 Block Diagram
16.66MHz
S_LOAD
P_LOAD
S_DATA
S_CLOCK
XTAL1
XTAL2
OSC
4
5
PHASE
DETECTOR
28
7
7–BIT DIV M
COUNTER
LATCH
VCO
DIV N
(1, 2, 4, 8)
LATCH
400–800
MHz
FOUT
FOUT
+3.3 or 5.0V
25
24
23
VCC0
LATCH
TEST
20
+3.3 or 5.0V
PLL_VCC
0
1
7–BIT SR
27
26
0
1
2–BIT SR
3–BIT SR
VCC1
21
+3.3 or 5.0V
M[6:0]
7
8
14
N[1:0]
2
17, 18
22, 19
OE
6
FREF_EXT
3
0
1
XTAL_SEL
15
PWR_DOWN
2
POWER DOWN
PROGRAMMING INTERFACE
Programming the device amounts to properly configuring
the internal dividers to produce the desired frequency at the
outputs. The output frequency can by represented by this
formula:
FOUT = FXTAL x M
÷
N
(1)
Where FXTAL is the crystal frequency, M is the loop divider
modulus, and N is the output divider modulus. Note that it is
possible to select values of M such that the PLL is unable to
achieve loop lock. To avoid this, always make sure that M is
selected to be 25
≤
M
≤
50 for a 16MHz input reference.
For input references other than 16MHz, the valid M values
can be calculated from the valid VCO range of 400–800MHz.
Assuming that a 16MHz reference frequency is used the
above equation reduces to:
FOUT = 16 x M
÷
N
Substituting the four values for N (1, 2, 4, 8) yields:
FOUT = 16M, FOUT = 8M,
FOUT = 4M and FOUT = 2M
for 25 < M < 50
The user can identify the proper M and N values for the
desired frequency from the above equations. The four output
frequency ranges established by N are 400–800MHz,
200–400MHz, 100–200MHz and 50–100MHz respectively.
From these ranges the user will establish the value of N
required, then the value of M can be calculated based on the
appropriate equation above. For example if an output
frequency of 384MHz was desired the following steps would
be taken to identify the appropriate M and N values. 384MHz
falls within the frequency range set by an N value of 2 so N
[1:0] = 00. For N = 2 FOUT = 8M and M = FOUT
÷
8.
Therefore M = 384
÷
8 = 48, so M[8:0] = 0110000.
For input reference frequencies other than 16MHz the set
of appropriate equations can be deduced from equation 1.
For computer applications another useful frequency base
would be 16.666MHz. From this reference one can generate
a family of output frequencies at multiples of the 33.333MHz
PCI clock. As an example to generate a 533.333MHz clock
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