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參數(shù)資料
| 型號： | MC12439 |
| 廠商： | Motorola, Inc. |
| 英文描述： | HIGH FREQUENCY PLL CLOCK GENERATOR |
| 中文描述： | 高頻PLL時鐘發(fā)生器 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 131K |
| 代理商： | MC12439 |
MC12439
TIMING SOLUTIONS
BR1333 — Rev 6
5
MOTOROLA
Figure 4. Serial Test Clock Block Diagram
FDIV4
MCNT
LOW
FOUT
MCNT
FREF
HIGH
TEST
MUX
7
0
TEST
FOUT
(VIA ENABLE GATE)
N DIVIDE
(1, 2, 4, 8)
0
1
PLL 12439
LATCH
Reset
PLOADB
M COUNTER
SLOAD
T0
T1
T2
VCO_CLK
SHIFT
REG
12–BIT
DECODE
SDATA
SCLOCK
MCNT
FREF
SEL_CLK
T2=T1=1, T0=0: Test Mode
SCLOCK is selected, MCNT is on TEST output, SCLOCK DIVIDE BY N is on FOUT pin
PLOADB acts as reset for test pin latch. When latch reset T2 data is shifted out TEST pin.
Shift Reg Out
DC CHARACTERISTICS
(TA = 0 to 70
°
C; VCC = 3.3 to 5.0V
±
5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
Input HIGH Voltage
2.0
V
VCC = 3.3 to 5.0V
VIL
Input LOW Voltage
0.8
V
VCC = 3.3 to 5.0V
IIN
Input Current
1.0
mA
IOH
Output HIGH Current (Note 1.)
(FOUT/FOUT Only)
50
mA
Continuous Current
VOH
Output HIGH Voltage
TEST
2.5
V
IOH = –0.8mA, (Note 2.)
VOL
Output LOW Voltage
TEST
0.4
V
IOL = 0.8mA, (Note 2.)
VOH
Output HIGH Voltage
FOUT
FOUT
2.27
2.47
V
VCC = 3.3V (Notes 3., 4.)
VOL
Output LOW Voltage
FOUT
FOUT
1.49
1.68
V
VCC = 3.3V (Notes 3., 4.)
ICC
Power Supply Current
VCC
PLL_VCC
90
15
110
20
mA
1. Maximum IOH spec implies the device can drive 25
impedance with the PECL outputs.
2. See Applications Information section for output level versus frequency information.
3. Output levels will vary 1:1 with VCC variation.
4. 50
to VCC – 2.0V pulldown.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC12439FN | 制造商:Motorola Inc 功能描述: 制造商:Motorola Inc 功能描述:MISCELLANEOUS CLOCK GENERATOR, 28 Pin, Plastic, PLCC |
| MC1243F | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC1245L | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC1246L | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC1247F | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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