參數(shù)資料
型號: MC12202D
廠商: MOTOROLA INC
元件分類: XO, clock
英文描述: MECL PLL COMPONENTS Serial Input PLL Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 1100 MHz, PDSO16
封裝: PLASTIC, SO-16
文件頁數(shù): 2/12頁
文件大?。?/td> 162K
代理商: MC12202D
MC12202
MOTOROLA
HIPERCOMM
BR1334 — Rev 4
2
16
1
φ
R
OSCin
15
2
φ
P
OSCout
14
3
fOUT
VP
13
4
BISW
VCC
Pinout: 16–Lead Packages
(Top View)
12
5
FC
Do
11
6
LE
GND
10
7
DATA
LD
9
8
CLK
fIN
20
1
φ
R
OSCin
19
2
NC
NC
18
3
φ
P
OSCout
17
4
fOUT
VP
Pinout: 20–Lead Package
(Top View)
16
5
BISW
VCC
15
6
FC
Do
14
7
LE
GND
13
8
DATA
LD
12
9
NC
NC
11
10
CLK
fIN
PIN NAMES
Pin
I/O
Function
16–Lead Pkg
Pin No.
20–Lead Pkg
Pin No.
OSCin
I
Oscillator input. A crystal is connected between OSCin and OSCout. An external
source can be AC coupled into this input
1
1
OSCout
O
Oscillator output. Pin should be left open if external source is used
2
3
VP
Power supply for charge pumps (VP should be greater than or equal to VCC) VP
provides power to the Do, BISW and
φ
P outputs
3
4
VCC
Power supply voltage input. Bypass capacitors should be placed as close as
possible to this pin and be connected directly to the ground plane.
4
5
Do
O
Internal charge pump output. Do remains on at all times
5
6
GND
Ground
6
7
LD
O
Lock detect, phase comparator output
7
8
fIN
I
Prescaler input. The VCO signal is AC–coupled into this pin
8
10
CLK
I
Clock input. Rising edge of the clock shifts data into the shift registers
9
11
DATA
I
Binary serial data input
10
13
LE
I
Load enable input (with internal pull up resistor). When LE is HIGH or OPEN, data
stored in the shift register is transferred into the appropriate latch (depending on
the level of control bit). Also, when LE is HIGH or OPEN, the output of the second
internal charge pump is connected to the BISW pin
11
14
FC
I
Phase control select (with internal pull up resistor). When FC is LOW, the
characteristics of the phase comparator and charge pump are reversed. FC also
selects fp or fr on the fOUT pin
12
15
BISW
O
Analog switch output. When LE is HIGH or OPEN (“analog switch is ON”) the
output of the second charge pump is connected to the BISW pin. When LE is LOW,
BISW is high impedance
13
16
fOUT
O
Phase comparator input signal. When FC is HIGH, fOUT=fr, programmable
reference divider output; when FC is LOW, fOUT=fp, programmable divider output
Output for external charge pump. Standard CMOS output level
14
17
φ
P
O
15
18
φ
R
O
Output for external charge pump. Standard CMOS output level
16
20
NC
No connect
2, 9, 12, 19
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