參數(shù)資料
型號(hào): MC10H164P
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: 8 LINE MULTIPLEXER
中文描述: 10H SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 1/4頁
文件大?。?/td> 117K
代理商: MC10H164P
SEMICONDUCTOR TECHNICAL DATA
2–257
REV 6
Motorola, Inc. 1996
9/96
The MC10H164 is a MECL 10H part which is a functional/pinout duplication
of the standard MECL 10K family part, with 100% improvement in propagation
delay, and no increase in power supply current.
The MC10H164 is designed to be used in data multiplexing and parallel to
serial conversion applications. Full parallel gating provides equal delays
through any data path. The MC10H164 incorporates an output buffer, eight
inputs and an enable. A high on the enable forces the output low. The open
emitter output allows the MC10H164 to be connected directly to a data bus. The
enable line allows an easy means of expanding to more than 8 lines using
additional MC10H164’s.
Propagation Delay, 1.0 ns Typical
Power Dissipation, 310 mW Typical (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current— Continuous
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
50
100
Vdc
— Surge
mA
Operating Temperature Range
TA
Tstg
0 to +75
°
C
°
C
°
C
Storage Temperature Range— Plastic
— Ceramic
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
IinH
IinL
VOH
VOL
VIH
VIL
83
75
83
mA
μ
A
μ
A
Vdc
Input Current High
512
320
320
Input Current Low
0.7
0.7
0.7
High Output Voltage
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Low Output Voltage
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
Enable
Data
Address
tpd
0.4
0.7
1.0
1.45
2.4
2.8
0.4
0.8
1.1
1.5
2.5
2.9
0.5
0.9
1.2
1.7
2.6
3.2
ns
Rise Time
tr
tf
0.5
1.5
0.5
1.6
0.5
1.7
ns
Fall Time
0.5
1.5
0.5
1.6
0.5
1.7
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP PIN ASSIGNMENT
VCC1
ENABLE
X3
X2
X1
X0
A
VEE
VCC2
Z
X7
X6
X5
X4
C
B
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LOGIC DIAGRAM
VCC1
VCC2
VEE=
=
=
PIN 1
PIN 16
PIN 8
A 7
B 9
C 10
Enable 2
X0 6
X1 5
X2 4
X3 3
X4 11
X5 12
X6 13
X7 14
Z
15
TRUTH TABLE
ADDRESS INPUTS
C
L
L
L
L
H
H
H
H
ENABLE
L
L
L
L
L
L
L
L
B
L
L
H
H
L
L
H
H
A
L
H
L
H
L
H
L
H
Z
X0
X1
X2
X3
X4
X5
X6
X7
H
X
L
X
X
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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