參數(shù)資料
型號: MC10H136P
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Autoswitching Power Mux 8-TSSOP -40 to 85
中文描述: 10H SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 1/4頁
文件大?。?/td> 116K
代理商: MC10H136P
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 6
Motorola, Inc. 1996
9/96
The MC10H136 is a high speed synchronous hexadecimal counter. This
10H part is a functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in counting frequency and no increase in
power-supply current.
Counting Frequency, 250 MHz Minimum
Power Dissipation, 625 mW Typical
Improved Noise Margin 150 mV
(Over Operating Voltage and Temperature Range)
Voltage Compensated
MECL 10K-Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
50
100
Vdc
— Surge
mA
Operating Temperature Range
TA
Tstg
0 to +75
°
C
°
C
°
C
Storage Temperature Range — Plastic
— Ceramic
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
IinH
165
150
165
mA
μ
A
Input Current High
Pins 5, 6, 11, 12, 13
Pin 9
Pin 7
Pin 10
430
670
535
380
275
420
335
240
275
420
335
240
Input Current Low
IinL
VOH
VOL
VIH
VIL
0.5
0.5
0.3
μ
A
Vdc
High Output Voltage
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Low Output Voltage
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
AC PARAMETERS
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
Propagation Delay
Clock to Q
Clock to Carry Out
Carry in to Carry
Out
tpd
0.7
1.0
0.7
2.3
4.8
2.5
0.7
1.0
0.7
2.4
4.9
2.6
0.7
1.0
0.7
2.5
5.0
2.7
ns
Set-up Time
Data (D0 to C)
Select (S to C)
Carry In (Cin to C)
(C to Cin)
tset
2.0
3.5
2.0
0
2.0
3.5
2.0
0
2.0
3.5
2.0
0
ns
Hold Time
Data (C to D0)
Select (C to S)
Carry In (C to Cin)
(Cin to C)
thold
0
–0.5
0
2.2
0
–0.5
0
2.2
0
–0.5
0
2.2
ns
Counting Frequency
fcount
tr
tf
250
250
250
MHz
Rise Time
0.5
2.3
0.5
2.4
0.5
2.5
ns
Fall Time
0.5
2.3
0.5
2.4
0.5
2.5
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts.
DIP PIN ASSIGNMENT
VCC1
Q2
Q3
COUT
D3
D2
S2
VEE
VCC2
Q1
Q0
CLOCK
D0
D1
CIN
S1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
FUNCTION SELECT TABLE
S1
S2
Preset (Program)
Increment (Count Up)
Hold Count
Decrement (Count Down)
Hold Count
L
H
H
CIN
X
L
H
L
H
Hold (Stop Count)
SEQUENTIAL TRUTH TABLE *
INPUTS
Carry
In
L
H
H
X
L
L
L
H
H
X
X
X
X
H
L
L
OUTPUTS
Clock
* *
Q0
Carry
Out
L
H
H
L
L
L
L
L
L
H
H
H
H
H
H
L
L
X
X
X
X
X
X
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
L
H
H
H
L
L
L
H
H
H
L
H
L
L
L
L
X
X
L
H
L
H
L
H
L
H
L
H
L
H
* Truth table shows logic states assuming inputs vary in
sequence shown from top to bottom.
** A clock H is defined as a clock input transition from a
low to a high logic level.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Operating Mode
X
D3
S1 S2 D0 D1 D2
L
L
H
H
H
H
L
L
L
Q1 Q2 Q3
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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