參數(shù)資料
型號: MC10H113PG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Quad Exclusive OR Gate
中文描述: 10H SERIES, QUAD 2-INPUT XOR GATE, PDIP16
封裝: LEAD FREE, PLASTIC, DIP-16
文件頁數(shù): 1/6頁
文件大?。?/td> 157K
代理商: MC10H113PG
Semiconductor Components Industries, LLC, 2006
February, 2006
Rev. 8
1
Publication Order Number:
MC10H113/D
MC10H113
Quad Exclusive OR Gate
Description
The MC10H113 is a Quad Exclusive OR Gate with an enable
common to all four gates. The outputs may be wire
ORed together to
perform a 4
bit comparison function (A = B). The enable is active
LOW.
Features
Propagation Delay, 1.3 ns Typical
Power Dissipation 175 mW Typ/Pkg (No Load)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K
Compatible
Pb
Free Packages are Available*
*For additional information on our Pb
Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
CDIP
16
L SUFFIX
CASE 620A
MARKING DIAGRAMS*
PDIP
16
P SUFFIX
CASE 648
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
SOEIAJ
16
CASE 966
16
1
16
1
MC10H113P
AWLYYWWG
1
16
MC10H113L
AWLYYWW
A
WL, L
YY, Y
WW, W = Work Week
G
= Pb
Free Package
= Assembly Location
= Wafer Lot
= Year
10H113
ALYWG
PLLC
20
FN SUFFIX
CASE 775
201
10H113G
AWLYYWW
1 20
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MC10H115M Quad Line Receiver
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MC10H115MELG Quad Line Receiver
MC10H115MG Quad Line Receiver
MC10H115PG Quad Line Receiver
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