參數(shù)資料
型號: MC10H104FN
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Quad 2-Input AND Gate
中文描述: 10H SERIES, QUAD 2-INPUT AND GATE, PQCC20
封裝: PLASTIC, LCC-20
文件頁數(shù): 1/3頁
文件大?。?/td> 94K
代理商: MC10H104FN
SEMICONDUCTOR TECHNICAL DATA
2–106
REV 6
Motorola, Inc. 1996
9/96
The MC10H104 is a quad 2–input AND gate. One of the gates has both
AND/NAND outputs available. This MECL 10H part is a functional/pinout
duplication of the standard MECL 10K family part, with 100% improvement in
propagation delay, and no increase in power– supply current.
Propagation Delay, 1.0 ns Typical
Power Dissipation 25 mW/Gate (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current— Continuous
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
50
100
Vdc
— Surge
mA
Operating Temperature Range
TA
Tstg
0 to +75
°
C
°
C
°
C
Storage Temperature Range— Plastic
— Ceramic
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
IinH
IinL
VOH
VOL
VIH
VIL
39
35
39
mA
μ
A
μ
A
Vdc
Input Current High
425
265
265
Input Current Low
0.5
0.5
0.3
High Output Voltage
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Low Output Voltage
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
tpd
tr
tf
0.4
1.6
0.45
1.75
0.45
1.9
ns
Rise Time
0.5
1.6
0.5
1.7
0.5
1.8
ns
Fall Time
0.5
1.6
0.5
1.7
0.5
1.8
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VCC1
AOUT
BOUT
AIN
AIN
BIN
BIN
VEE
VCC2
DOUT
COUT
DIN
DIN
CIN
CIN
DOUT
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
14
13
12
11
10
3
7
6
2
5
4
9
15
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
相關(guān)PDF資料
PDF描述
MC10H104 Quad 2-Input AND Gate
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