參數資料
型號: MC10E1652
廠商: ON SEMICONDUCTOR
英文描述: 5V, -5V ECL Dual ECL Output Comparator with Latch(5V/-5V ECL,雙ECL輸出比較器(帶鎖存器))
中文描述: 5V的,- 5V的ECL雙ECL鎖存器輸出的比較器(5V/-5V化學發(fā)光雙ECL輸出比較器(帶鎖存器))
文件頁數: 4/10頁
文件大小: 89K
代理商: MC10E1652
MC10E1652
http://onsemi.com
4
Figure 3. Typical Hysteresis Curve
Figure 4. Hysteresis Programming Voltage
40
30
20
10
0
0.2
0.8
1.0
1.2
1.4
1.6
1.8
20 16 12
8
4 Vref
4
8
12
16
20
0.1
0.0
0.1
0.2
0.3
0.4
0.5
Vin, DIFFERENTIAL INPUT VOLTAGE (mV)
PROGRAMMING VOLTAGE (VOLTAGE ABOVE VEE)
Q
H
HYSTERESIS
T = 0
°
C
T =
85
°
C
T =
25
°
C
Table 5. AC CHARACTERISTICS
V
CC
= +5.0 V
±
5%; V
EE
= 5.2 V
±
5%, V
CC
= 0 V (Note 6)
0
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
f
MAX
Maximum Toggle Frequency
TBD
> 1.0
TBD
GHz
t
PLH
t
PHL
Propagation Delay to Output (Note 7)
V to Q
LEN to Q
600
400
750
575
900
750
625
400
775
575
925
750
700
500
850
650
1050
850
ps
t
s
Setup Time
V
450
300
450
300
550
350
ps
t
h
Enable Hold Time
V
50
250
50
250
100
250
ps
t
pw
Minimum Pulse Width
LEN
400
400
400
ps
t
skew
Within Device Skew (Note 8)
15
15
15
ps
t
JITTER
CycletoCycle Jitter
TBD
TBD
TBD
ps
T
DE
Delay Dispersion
(ECL Levels) (Notes 9 10)
(Notes 9, 11)
100
60
ps
T
DL
Delay Dispersion
(TTL Levels) (Notes 12, 13)
(Notes 11, 12)
350
100
ps
VPP
Differential Input Voltage |V1 V2|
3.7
3.7
3.7
V
t
r
t
f
Rise/Fall Times
(20-80%)
225
325
475
225
325
475
250
375
500
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input V
IL
and V
IH
parameters vary 1:1 with V
CC
. Output V
OH
and V
OL
parameters vary 1:1 with GND.
7. The propagation delay is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output
signals. For propagation delay measurements the threshold level (V
THR
) is centered about an 850 mV input logic swing with a slew rate of
0.75 V/NS. There is an insignificant change in the propagation delay over the input common mode range.
8. t
skew
is the propagation delay skew between comparator A and comparator B for a particular part under identical input conditions.
9. Refer to Figure 4 and note that the input is at 850 mV ECL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
10.The slew rate is 0.25 V/NS for input rising edges.
11.The slew rate is 0.75 V/NS for input rising edges.
12.Refer to Figure 5 and note that the input is at 2.5 V TTL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
13.The slew rate is 0.3 V/NS for input rising edges.
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