參數(shù)資料
型號: MC10E136FN
廠商: ON Semiconductor
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC COUNTER U/D 6BIT UNIV 28-PLCC
標準包裝: 37
系列: 10E
邏輯類型: 二進制計數(shù)器
方向: 上,下
元件數(shù): 1
每個元件的位元數(shù): 6
復(fù)位: 異步
計時: 同步
計數(shù)速率: 650MHz
觸發(fā)器類型: 正邊沿
電源電壓: 4.2 V ~ 5.7 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 管件
MC10E136, MC100E136
http://onsemi.com
7
APPLICATIONS INFORMATION
Overview
The MC10E/100E136 is a 6-bit synchronous, presettable,
cascadable universal counter. Using the S1 and S2 control
pins the user can select between preset, count up, count
down and hold count. The master reset pin will reset the
internal counter, and set the COUT, CLOUT, and CLIN
flip-flops. Unlike previous 136 type counters the carry out
outputs will go to a high state during the preset operation. In
addition since the carry out outputs are registered they will
not go low if terminal count is loaded into the register. The
look-ahead-carry out output functions similarly.
Note from the schematic the use of the master information
from the least significant bits for control of the two carry out
functions. This architecture not only reduces the carry out
delay, but is essential to incorporate the registered carry out
functions. In addition to being faster, because these
functions are registered the resulting carry out signals are
stable and glitch free.
Cascading Multiple E136 Devices
Many applications require counters significantly larger
than the 6 bits available with the E136. For these
applications several E136 devices can be cascaded to
increase the bit width of the counter to meet the needs of the
application.
In the past cascading several 136 type universal counters
necessarily impacted the maximum count frequency of the
resulting counter chain. This performance impact was the
result of the terminal count signal of the lower order counters
having to ripple through the entire counter chain. As a result
past counters of this type were not widely used in large bit
counter applications.
An alternative counter architecture similar to the E016
binary counter was implemented to alleviate the need to
ripple propagate the terminal count signal. Unfortunately
these types of counters require external gating for cascading
designs of more than two devices. In addition to requiring
additional components, these external gates limit the
cascaded count frequency to a value less than the free
running count frequency of a single counter. Although there
is a performance impact with this type of architecture it is
minor compared to the impact of the ripple propagate
designs. As a result the E016 type counters have been used
extensively in applications requiring very high speed, wide
bit width synchronous counters.
ON Semiconductor has incorporated several improvements
to past universal counter designs in the E136 universal counter.
These enhancements make the E136 the unparalleled leader in
its class. With the addition of look-ahead-carry features on the
terminal count signal, very large counter chains can be
designed which function at very nearly the same clock
frequency as a single free running device. More importantly
these counter chains require no external gating. Figure 1 below
illustrates the interconnect scheme for using the
look-ahead-carry features of the E136 counter.
Figure 3. 24-bit Cascaded E136 Counter
Q0 > Q5
D0 > D5
CLK
Q0 > Q5
D0 > D5
CLK
Q0 > Q5
D0 > D5
CLK
LSB
Q0 > Q5
D0 > D5
CLOUT
COUT
CLIN
CIN
CLK
CLOUT
COUT
CLK
000001
000000
111111
111110
111101
CLOCK
“LO”
CLOUT
COUT
CLIN
CIN
CLOUT
COUT
CLIN
CIN
MSB
CLOUT
COUT
CLIN
CIN
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