參數(shù)資料
型號(hào): MC10174
廠商: ON SEMICONDUCTOR
英文描述: Dual 4 to 1 Multiplexer
中文描述: 雙4至1多路復(fù)用器
文件頁(yè)數(shù): 2/4頁(yè)
文件大?。?/td> 110K
代理商: MC10174
MC10174
3–123
MOTOROLA
MECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
Pin
Under
Test
Test Limits
–30
°
C
+25
°
C
+85
°
C
Characteristic
Symbol
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
IinH
8
80
58
73
80
mAdc
Input Current
4
14
350
525
220
330
220
330
μ
Adc
IinL
VOH
VOL
VOHA
VOLA
4
0.5
0.5
0.3
μ
Adc
Output Voltage
Logic 1
15
–1.060
–0.890
–0.960
–0.810
–0.890
–0.700
Vdc
Output Voltage
Logic 0
15
–1.890
–1.675
–1.850
–1.650
–1.825
–1.615
Vdc
Threshold Voltage
Logic 1
15
–1.080
–0.980
–0.910
Vdc
Threshold Voltage
Logic 0
15
–1.655
–1.630
–1.595
Vdc
Switching Times
(50
Load)
ns
Propagation Delay
t13+15+
t13–15–
t7+15–
t7–15+
t14+15–
t14–15+
t+
15
15
15
15
15
15
1.4
1.4
1.9
1.9
1.0
1.0
5.0
5.0
6.6
6.6
3.3
3.3
1.5
1.5
2.0
2.0
1.0
1.0
3.5
3.5
5.0
5.0
2.0
2.0
4.7
4.7
6.2
6.2
3.1
3.1
1.4
1.4
2.1
2.1
0.9
0.9
5.0
5.0
6.6
6.6
3.4
3.4
Rise Time
(20 to 80%)
15
1.0
3.4
1.1
2.0
3.3
1.1
3.6
Fall Time
(20 to 80%)
t–
15
1.0
3.4
1.1
2.0
3.3
1.1
3.6
ELECTRICAL CHARACTERISTICS
(continued)
Each MECL 10,
t th d
ifi
ti
t
after thermal equilibrium has been established. The
circuitisinatestsocketormountedonaprintedcircuit
circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 linear
fpm is maintained Outputs are terminated through a
fpm is maintained. Outputs are terminated through a
50–ohm resistor to –2.0 volts. Test procedures are
shown for only one gate. The other gates are tested in
the same manner.
h
i th t
t t bl
TEST VOLTAGE VALUES
(Volts)
g
@ Test Temperature
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
–30
°
C
+25
°
C
+85
°
C
–0.810
–1.850
–1.105
–1.475
–5.2
–0.700
–1.825
–1.035
–1.440
–5.2
Pin
Under
Test
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(VCC)
Gnd
Characteristic
Symbol
VIHmax
VILmin
VIHAmin
VILAmax
VEE
8
Power Supply Drain Current
IE
IinH
8
1, 16
Input Current
4
14
4
14
8
8
1, 16
1, 16
IinL
VOH
VOL
VOHA
VOLA
4
4
8
1, 16
Output Voltage
Logic 1
15
13
8
1, 16
Output Voltage
Logic 0
15
14
8
1, 16
Threshold Voltage
Logic 1
15
13
8
1, 16
Threshold Voltage
Logic 0
15
14
8
1, 16
Switching Times
(50
Load)
+1.11V
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t13+15+
t13–15–
t7+15–
t7–15+
t14+15–
t14–15+
t+
15
15
15
15
15
15
11
11
13
13
13
13
7
7
14
14
15
15
15
15
15
15
8
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
Rise Time
(20 to 80%)
15
13
14
15
8
1, 16
Fall Time
(20 to 80%)
t–
15
13
14
15
8
1, 16
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