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參數(shù)資料
| 型號： | MC10135FNR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 鎖存器 |
| 英文描述： | 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 108K |
| 代理商： | MC10135FNR2 |
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
S1 5
J1 7
K1 6
R1 4
C 9
S2 12
J2 10
K2
11
R2 13
Q1
Q2
2
3
15
14
DIP PIN ASSIGNMENT
VCC1
Q1
R1
S1
K1
J1
VEE
VCC2
Q2
R2
S2
K2
J2
C
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 18 of the ON Semiconductor MECL
Data Book (DL122/D).
Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10135/D
MC10135
Dual J-K Master-Slave
Flip-Flop
The MC10135 is a dual master–slave dc coupled J–K flip–flop.
Asynchro– nous set (S) and reset (R) are provided. The set and reset
inputs override the clock.
A common clock is provided with separate J–K inputs. When the
clock is static, the J–K inputs do not effect the output.
The output states of the flip–flop change on the positive transition of
the clock.
P
D = 280 mW typ/pkg (No Load)
f
Tog = 140 MHz typ
t
pd = 3.0 ns typ
t
r, tf = 2.5 ns typ (20%–80%)
R–S TRUTH TABLE
CLOCK J–K TRUTH TABLE*
R
S
Qn+1
J
K
Qn+1
L
H
L
H
L
H
Qn
H
L
N.D.
L
H
L
H
L
H
Qn
L
H
Qn
N.D. = Not Defined
* Output states change on positive
transition of clock for J–K input
condition present.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10135L
CDIP–16
25 Units / Rail
MC10135P
PDIP–16
25 Units / Rail
MC10135FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10135L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10135
AWLYYWW
1
16
MC10135P
AWLYYWW
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10135P | 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 |
| MC10135FN | 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 |
| MC10136FNR2 | 10K SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PQCC20 |
| MC10154P | 10K SERIES, ASYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, PDIP16 |
| MC10154L | 10K SERIES, ASYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, CDIP16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10135L | 制造商:ON Semiconductor 功能描述:Flip Flop JK-Master-Slave Type Pos-Edge 1-Element 16-Pin CDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10135P | 制造商:ON Semiconductor 功能描述:Flip Flop JK-Master-Slave Type Pos-Edge 1-Element 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10136FN | 制造商:ON Semiconductor 功能描述:Counter Single 4-Bit Hexadecimal UP/Down 20-Pin PLLC Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10136FN WAF | 制造商:ON Semiconductor 功能描述: |
| MC10136FNR2 | 制造商:Motorola Inc 功能描述: |
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