@ ±5% VCC
參數(shù)資料
型號(hào): MC100H642FNR2
廠商: ON Semiconductor
文件頁(yè)數(shù): 6/10頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK DRIVER ECL-TTL 28PLCC
產(chǎn)品變化通告: Product Discontinuation 07/Oct/2008
標(biāo)準(zhǔn)包裝: 500
類型: 時(shí)鐘/頻率發(fā)生器,扇出緩沖器(分配),多路復(fù)用器
PLL: 無(wú)
主要目的: 68030,68040 MPU
輸入: ECL,TTL
輸出: TTL
電路數(shù): 1
比率 - 輸入:輸出: 2:8
差分 - 輸入:輸出: 是/是
頻率 - 最大: 100MHz
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 帶卷 (TR)
MC10H642, MC100H642
http://onsemi.com
5
Figure 3. MC10H642 Positive PW versus Load
@ ±5% VCC, TA = 25°C
5.25
5.00
4.75
11
10
9
0
1020
304050
60
CAPACITIVE LOAD (pF)
POSITIVE
PULSE
WIDTH
(ns)
CAPACITIVE LOAD (pF)
Figure 4. MC10H642 Negative PW versus Load
@ ±5% VCC, TA = 25°C
5.25
5.00
4.75
11
10
9
0
10
20
304050
60
NEGA
TIVE
PULSE
WIDTH
(ns)
CAPACITIVE LOAD (pF)
Figure 5. MC10H642 Positive PW versus Load
@ ±2.5% VCC, TA = 25°C
5.125
5.00
4.875
10.6
10.4
10.2
10.0
9.8
9.6
9.4
9.2
0
10
203040
5060
POSITIVE
PULSE
WIDTH
(ns)
CAPACITIVE LOAD (pF)
Figure 6. MC10H642 Negative PW versus Load
@ ±2.5% VCC, TA = 25°C
5.125
5.00
4.875
10.8
10.6
10.4
10.2
10.0
9.8
9.6
9.4
0
10
2030
4050
60
NEGA
TIVE
PULSE
WIDTH
(ns)
TEMPERATURE (°C)
Figure 7. MC10H642 Positive PW versus Temperature,
VCC = 5.0 V
50 pF
25 pF
0 pF
10.4
10.2
10.0
9.8
9.6
9.4
0
2040
6080
100
POSITIVE
PULSE
WIDTH
(ns)
Figure 8. MC10H642 Negative PW versus
Temperature, VCC = 5.0 V
50 pF
25 pF
0 pF
10.5
10.3
10.1
9.9
9.7
9.5
0
20
40
60
80
100
TEMPERATURE (°C)
NEGA
TIVE
PULSE
WIDTH
(ns)
10/100H642 DUTY CYCLE CONTROL
To maintain a duty cycle of ±5% at 50 MHz, limit the load capacitance and/or power supply variation as shown in Figures
1 and 2. For a ±2.5% duty cycle limit, see Figures 3 and 4. Figures 5 and 6 show duty cycle variation with temperature.
Figure 7 shows typical TPD versus load. Figure 8 shows reset recovery time. Figure 9 shows output states after power up.
Best duty cycle control is obtained with a single
mP load and minimum line length.
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