參數(shù)資料
型號(hào): MC100ES7111FA
廠(chǎng)商: FREESCALE SEMICONDUCTOR INC
元件分類(lèi): 時(shí)鐘及定時(shí)
英文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: 7 X 7 MM, PLASTIC, LQFP-32
文件頁(yè)數(shù): 1/6頁(yè)
文件大小: 128K
代理商: MC100ES7111FA
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
755
Freescale Semiconductor, Inc.
TECHNICAL DATA
Order number: MC100ES7111
Rev 0, 12/2002
Preliminary Information
Low Voltage 1:10 Differential LVDS
Clock Fanout Buffer
The MC100ES7111 is a LVDS differential clock fanout buffer. Designed for
most demanding clock distribution systems, the MC100ES7111 supports
various applications that require the distribution of precisely aligned differential
clock signals. Using SiGe technology and a fully differential architecture, the
device offers very low skew outputs and superior digital signal characteristics.
Target applications for this clock driver are high performance clock distribution
in computing, networking and telecommunication systems.
Features
1:10 differential clock fanout buffer
50 ps maximum device skew1
SiGe technology
Supports DC to 1000 MHz operation(1) of clock or data signals
LVDS compatible differential clock outputs
PECL and HSTL/LVDS compatible differential clock inputs
3.3V power supply
Supports industrial temperature range
Standard 32-lead LQFP package
Functional Description
The MC100ES7111 is designed for low skew clock distribution systems and supports clock frequencies up to 1000 MHz1. The
device accepts two clock sources. The CLK0 input accepts LVDS or HSTL compatible signals and CLK1 accepts PECL compatible
signals. The selected input signal is distributed to 10 identical, differential LVDS compatible outputs.
The output enable control is synchronized internally preventing output runt pulse generation. Outputs are only disabled or enabled
when the outputs are already in logic low state (true outputs logic low, inverted outputs logic high). The internal synchronizer eliminates
the setup and hold time requirements for the external clock enable signal. The device is packaged in a 7x7 mm2 32-lead LQFP
package.
1. AC specifications are design targets and subject to change
MC100ES7111
LOW VOLTAGE
1:10 DIFFERENTIAL
LVDS CLOCK
FANOUT DRIVER
FA SUFFIX
32-LEAD TQFP PACKAGE
CASE 873A-03
相關(guān)PDF資料
PDF描述
MC100ES8011HEFR2 100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MC100ES8011HD 100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MC100ES8011HEF 100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MC100ES8011PDR2 100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MC100ES8011PEFR2 100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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