參數(shù)資料
型號(hào): MC100ES6254AC
廠(chǎng)商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 0K
描述: IC CLK BUFF MUX 2:6 3GHZ 32-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 100ES
類(lèi)型: 扇出緩沖器(分配),多路復(fù)用器
電路數(shù): 1
比率 - 輸入:輸出: 2:6
差分 - 輸入:輸出: 是/是
輸入: LVCMOS,LVPECL
輸出: LVPECL
頻率 - 最大: 3GHz
電源電壓: 2.375 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 托盤(pán)
DATASHEET
2.5/3.3V Differential LVPECL 2x2 Clock
Switch and Fanout Buffer
MC100ES6254
MC100ES6254 REV. 7 JANUARY 7, 2013
1
2013 Integrated Device Technology, Inc.
The Freescale MC100ES6254 is a bipolar monolithic differential 2x2 clock
switch and fanout buffer. Designed for most demanding clock distribution
systems, the MC100ES6254 supports various applications that require a large
number of outputs to drive precisely aligned clock signals. The device is capable
of driving and switching differential LVPECL signals. Using SiGe technology and
a fully differential architecture, the device offers superior digital signal
characteristics and very low clock skew error. Target applications for this clock
driver are high performance clock/data switching, clock distribution or data
loopback in computing, networking and telecommunication systems.
Features
Fully differential architecture from input to all outputs
SiGe technology supports near-zero output skew
Supports DC to 3GHz operation(1) of clock or data signals
LVPECL compatible differential clock inputs and outputs
LVCMOS compatible control inputs
Single 3.3 V or 2.5 V supply
50 ps maximum device skew(1)
Synchronous output enable eliminating output runt pulse generation and
metastability
Standard 32 lead LQFP package
Industrial temperature range
32-lead Pb-free package
Functional Description
MC100ES6254 is designed for very skew critical differential clock distribution
systems and supports clock frequencies from DC up to 3.0GHz. Typical
applications for the MC100ES6254 are primary clock distribution, switching and
loopback systems of high-performance computer, networking and
telecommunication systems, as well as on-board clocking of OC-3, OC-12 and
OC-48 speed communication systems. Primary purpose of the MC100ES6254 is
high-speed clock switching applications. In addition, the MC100ES6254 can be
configured as single 1:6 or dual 1:3 LVPECL fanout buffer for clock signals, or as
loopback device in high-speed data applications.
The MC100ES6254 can be operated from a 3.3 V or 2.5 V positive supply
without the requirement of a negative supply line.
1. The device is functional up to 3GHz and characterized up to 2.7GHz.
ORDERING INFORMATION
Device
Package
MC100ES6254AC
LQFP-32 (Pb-Free)
MC100ES6254ACR2
LQFP-32 (Pb-Free)
2.5/3.3 V DIFFERENTIAL
LVPECL 2x2
CLOCK SWITCH
AND FANOUT BUFFER
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-04
Product Discontinuance Notice – Last Time Buy Expires on (12/7/2013)
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