參數(shù)資料
型號(hào): MC100EP142
廠商: ON SEMICONDUCTOR
英文描述: 3.3V / 5V ECL 9 Bit Shift Register(3.3V / 5V ECL 9位移位寄存器)
中文描述: 3.3 / 5V的ECL移位寄存器9位(3.3 / 5V的ECL 9位移位寄存器)
文件頁(yè)數(shù): 9/13頁(yè)
文件大小: 181K
代理商: MC100EP142
MC10EP142, MC100EP142
http://onsemi.com
9
Table 11. AC CHARACTERISTICS
V
CC
= 3.0 V to 5.5 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
=
3.0 V to
5.5 V (Note 26)
Symbol
Characteristic
40
°
C
25
°
C
85
°
C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
f
SHIFT
Maximum Shift Frequency
2.8
GHz
t
PLH
,
t
PHL
Propagation Delay to Output
CLKx
MR
500
500
625
625
750
750
550
550
675
675
800
800
575
575
700
700
825
825
ps
t
s
Setup Time
D
SEL
50
100
50
50
50
100
50
50
50
100
50
50
ps
t
h
Hold Time
D
SEL
100
50
50
50
100
50
50
50
100
50
50
50
ps
t
RR
Reset Recovery Time
800
ps
t
pw
Minimum Pulse Width
200
ps
t
SKEW
Within-Device Skew (Note 27)
Duty Cycle Skew (Note 28)
Q, Q
50
5.0
100
20
50
5.0
100
20
50
5.0
100
20
ps
t
JITTER
Random Clock Jitter (Figure 3)
1
2
1
2
1
2
ps
V
inpp
Input Voltage Swing/Sensitivity
(Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
t
r
,
t
f
Rise/Fall Times @ 50 MHz
(20 - 80%)
110
180
250
125
190
275
150
215
300
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
26.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to V
CC
2.0 V.
27.Within-device skew is defined as identical transitions on similar paths through a device.
28.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
éééééééééé
0
0
1000
100
200
300
400
500
600
700
800
900
2000
3000
4000
5000
6000
Figure 3. Output Voltage Amplitude / RMS Jitter vs.
Input Frequency at Ambient Temperature (Typical)
INPUT FREQUENCY (MHz)
1
2
3
4
5
6
7
8
9
O
J
O
éé
éé
éé
相關(guān)PDF資料
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