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參數(shù)資料
型號(hào): MC100EP105MNG
廠商: ON Semiconductor
文件頁數(shù): 11/11頁
文件大?。?/td> 0K
描述: IC GATE AND/NAND QUAD 2INP 32QFN
標(biāo)準(zhǔn)包裝: 74
系列: 100EP
邏輯類型: 與/與非門
電路數(shù): 4
輸入數(shù): 8 輸入(2,2,2,2)
施密特觸發(fā)器輸入:
輸出類型: 差分
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 管件
MC10EP105, MC100EP105
http://onsemi.com
9
ORDERING INFORMATION
Device
Package
Shipping
MC10EP105FA
LQFP32
250 Units / Tray
MC10EP105FAG
LQFP32
(PbFree)
250 Units / Tray
MC10EP105FAR2
LQFP32
2000 / Tape & Reel
MC10EP105FAR2G
LQFP32
(PbFree)
2000 / Tape & Reel
MC100EP105FA
LQFP32
250 Units / Tray
MC100EP105FAG
LQFP32
(PbFree)
250 Units / Tray
MC100EP105FAR2
LQFP32
2000 / Tape & Reel
MC100EP105FAR2G
LQFP32
(PbFree)
2000 / Tape & Reel
MC10EP105MNG
QFN32
(PbFree)
74 Units / Rail
MC100EP105MNG
74 Units / Rail
MC10EP105MNR4G
1000 / Tape & Reel
MC100EP105MNR4G
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1672/D
The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
相關(guān)PDF資料
PDF描述
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TXR18AB00-2420AI ADPTR TINEL LOCK STR SHELL 24
TXR18AB00-2414AI ADPTR TINEL LOCK STR SHELL 24
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