參數(shù)資料
型號: MC100E210FN
廠商: ON SEMICONDUCTOR
元件分類: 時鐘及定時
英文描述: Low Voltage Dual 1:4, 1:5 Differential Fanout Buffer
中文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 3/8頁
文件大?。?/td> 121K
代理商: MC100E210FN
MC100LVE210, MC100E210
http://onsemi.com
3
MC100LVE210
ECL DC CHARACTERISTICS
–40
°
C
0
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
VOH
Output HIGH Voltage
–1.085
–1.005
–0.880
–1.025
–0.955
–0.880
–1.025
–0.955
–0.880
–1.025
–0.955
–0.880
V
VOL
Output LOW Voltage
–1.830
–1.695
–1.555
–1.810
–1.705
–1.620
–1.810
–1.705
–1.620
–1.810
–1.705
–1.620
V
VIH
Input HIGH Voltage
–1.165
–0.880
–1.165
–0.880
–1.165
–0.880
–1.165
–0.880
V
VIL
Input LOW Voltage
–1.810
–1.475
–1.810
–1.475
–1.810
–1.475
–1.810
–1.475
V
VBB
Output Reference
Voltage
–1.38
–1.26
–1.38
–1.26
–1.38
–1.26
–1.38
–1.26
V
VEE
Power Supply Voltage
–3.0
–3.8
–3.0
–3.8
–3.0
–3.8
–3.0
–3.8
V
IIH
Input HIGH Current
150
150
150
150
μ
A
IEE
Power Supply Current
55
55
55
65
mA
MC100LVE210
PECL DC CHARACTERISTICS
–40
°
C
0
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
VOH
Output HIGH Voltage
1
2.215
2.295
2.42
2.275
2.345
2.420
2.275
2.345
2.420
2.275
2.345
2.420
V
VOL
Output LOW Voltage
1
1.47
1.605
1.745
1.490
1.595
1.680
1.490
1.595
1.680
1.490
1.595
1.680
V
VIH
Input HIGH Voltage
1
2.135
2.420
2.135
2.420
2.135
2.420
2.135
2.420
V
VIL
Input LOW Voltage
1
1.490
1.825
1.490
1.825
1.490
1.825
1.490
1.825
V
VBB
Output Reference
Voltage
1
1.92
2.04
1.92
2.04
1.92
2.04
1.92
2.04
V
VCC
Power Supply Voltage
3.0
3.8
3.0
3.8
3.0
3.8
3.0
3.8
V
IIH
Input HIGH Current
150
150
150
150
μ
A
IEE
1. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC.
MC100LVE210
AC CHARACTERISTICS
(VEE = VEE (min) to VEE (max); VCC = VCCO = GND)
–40
°
C
Power Supply Current
55
55
55
65
mA
0
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Condition
tPLH
tPHL
Propagation Delay to Output
IN (differential)
IN (single–ended)
475
400
675
700
475
400
675
700
500
450
700
750
500
450
700
750
ps
Note 1
Note 2
tskew
Within–Device SkewQa
Qa
Part–to–Part Skew (Diff)
Qb
Qb
Qa,Qb
50
50
75
75
200
50
30
75
50
200
50
30
75
50
200
50
30
75
50
200
ps
Note 3
VPP
Minimum Input Swing
500
500
500
500
mV
Note 4
VCMR
Common Mode Range
–1.5
–0.4
–1.5
–0.4
–1.5
–0.4
–1.5
–0.4
V
Note 5
tr/tf
Output Rise/Fall Time
200
600
200
600
200
600
200
600
ps
20%–80%
1. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
2. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
3. The within–device skew is defined as the worst case difference between any two similar delay paths within a single device.
4. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP(min) is AC limited
for the LVE210 as a differential input as low
as 50 mV will still produce full ECL levels at the output.
5. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL
level must be such that the peak to peak
voltage is less than 1.0 V and greater than or equal to VPP(min).
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