參數(shù)資料
型號: MC100E104FNR2G
廠商: ON Semiconductor
文件頁數(shù): 5/7頁
文件大小: 0K
描述: IC GATE AND/NAND QD 2INP 28-PLCC
產(chǎn)品變化通告: Dimensional change 21/Oct/2008
標(biāo)準(zhǔn)包裝: 500
系列: 100E
邏輯類型: 與/與非門
電路數(shù): 5
輸入數(shù): 10 輸入(2,2,2,2,2)
施密特觸發(fā)器輸入:
輸出類型: 差分
電源電壓: 4.2 V ~ 5.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 帶卷 (TR)
MC10E104, MC100E104
http://onsemi.com
5
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
50
W
50
W
VTT
VTT = VCC 2.0 V
ORDERING INFORMATION
Device
Package
Shipping
MC10E104FN
PLCC28
37 Units / Rail
MC10E104FNG
PLCC28
(PbFree)
37 Units / Rail
MC10E104FNR2
PLCC28
500 / Tape & Reel
MC10E104FNR2G
PLCC28
(PbFree)
500 / Tape & Reel
MC100E104FN
PLCC28
37 Units / Rail
MC100E104FNG
PLCC28
(PbFree)
37 Units / Rail
MC100E104FNR2
PLCC28
500 / Tape & Reel
MC100E104FNR2G
PLCC28
(PbFree)
500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPS
t I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1642/D
The ECL Translator Guide
AND8001/D
Odd Number Counters Design
AND8002/D
Marking and Date Codes
AND8020/D
Termination of ECL Logic Devices
AND8066/D
Interfacing with ECLinPS
AND8090/D
AC Characteristics of ECL Devices
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