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參數(shù)資料
| 型號： | MC-458CA725 |
| 廠商： | NEC Corp. |
| 英文描述： | 8M-Word By 72-BIT Dynamic RAM Module(8M×72位動態(tài)RAM模塊) |
| 中文描述： | 800萬字由72位動態(tài)內(nèi)存模塊（8米× 72位動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 135K |
| 代理商： | MC-458CA725 |
6
MC-458CA725
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter
Symbol
Test condition
MIN.
MAX.
Unit
Notes
Operating current
I
CC1
Burst length = 1,
/CAS latency
= 2
585
mA
1
t
RC
≥
t
RC (MIN.)
, I
O
= 0
mA
/CAS latency
= 3
675
Precharge standby current in
I
CC2
P
CKE
≤
V
IL (MAX.)
, t
CK
= 15
ns
9
mA
power down mode
I
CC2
PS
CKE
≤
V
IL (MAX.)
, t
CK
=
∞
4.5
Precharge standby current in
I
CC2
N
CKE
≥
V
IH (MIN.)
, t
CK
= 15
ns, /CS
≥
V
IH (MIN.)
,
180
mA
non power down mode
Input signals are changed one time during 30
ns.
I
CC2
NS
CKE
≥
V
IH (MIN.)
, t
CK
=
∞
,
54
Input signals are stable.
Active standby current in
I
CC3
P
CKE
≤
V
IL (MAX.)
, t
CK
= 15
ns
45
mA
power down mode
I
CC3
PS
CKE
≤
V
IL (MAX.)
, t
CK
=
∞
36
Active standby current in
I
CC3
N
CKE
≥
V
IH (MIN.)
, t
CK
= 15
ns, /CS
≥
V
IH (MIN.)
,
225
mA
non power down mode
Input signals are changed one time during 30
ns.
I
CC3
NS CKE
≥
V
IH (MIN.)
, t
CK
=
∞
,
90
Input signals are stable.
Operating current
I
CC4
t
CK
≥
t
CK (MIN.)
, I
O
= 0
mA
/CAS latency = 2
630
mA
2
(Burst mode)
/CAS latency = 3
945
Refresh current
I
CC5
t
RC
= 100 ns,
t
CK (MIN.)
/CAS latency = 2
945
mA
3
/CAS latency = 3
1035
Self refresh current
I
CC6
CKE
≤
0.2
V
9
mA
Input leakage current
I
I (L)
V
I
= 0 to 3.6
V,
All other pins not under test = 0 V
–9
+9
μ
A
Output leakage current
I
O (L)
D
OUT
is disabled, V
O
= 0 to 3.6
V
–1.5
+1.5
μ
A
High level output voltage
V
OH
I
O
= –4.0
mA
2.4
V
Low level output voltage
V
OL
I
O
= +4.0
mA
0.4
V
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC-458CA726 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-458CA726EFB-A10 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-458CA726EFB-A80 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-458CA726PFB-A10 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-458CA726PFB-A80 | 制造商:NEC 制造商全稱:NEC 功能描述:8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
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