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參數(shù)資料
| 型號： | MC-4532CD647XFA-A75 |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 32M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| 中文描述： | 32M X 64 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大小： | 173K |
| 代理商： | MC-4532CD647XFA-A75 |
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Product
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for
availability and additional information.
MOS INTEGRATED CIRCUIT
MC-4532CD647XFA
32M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE
UNBUFFERED TYPE
DATA SHEET
Document No. E0230N20 (Ver 2.0)
Date Published June 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
Description
The MC-4532CD647XFA is 33,554,432 words by 64 bits synchronous dynamic RAM module on which 16 pieces of
128M SDRAM:
PD45128841 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
33,554,432 words by 64 bits organization
Clock frequency and access time from CLK.
Part number
/CAS latency
Clock frequency
(MAX.)
Access time from CLK
(MAX.)
MC-4532CD647XFA-A75
CL = 3
133 MHz
5.4 ns
CL = 2
100 MHz
6.0 ns
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
Pulsed interface
Possible to assert random column address in every cycle
Quad internal banks controlled by BA0 and BA1 (Bank Select)
Programmable burst-length (1, 2, 4, 8 and full page)
Programmable wrap sequence (Sequential / Interleave)
Programmable /CAS latency (2, 3)
Automatic precharge and controlled precharge
CBR (Auto) refresh and self refresh
All DQs have 10 ±10 % of series resistor
Single 3.3 V ± 0.3 V power supply
LVTTL compatible
4,096 refresh cycles/64 ms
Burst termination by Burst Stop command and Precharge command
168-pin dual in-line memory module (Pin pitch = 1.27 mm)
Unbuffered type
Serial PD
This product became EOL in March, 2004.
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