參數(shù)資料
型號(hào): MBT673
廠商: Fujitsu Limited
英文描述: 16-Bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁(yè)數(shù): 99/106頁(yè)
文件大小: 1648K
代理商: MBT673
MB90670/675 Series
99
(Continued)
7.
Notes on Using A/D Converter
Select the output impedance value for the external circuit of analog input according to the following conditions.
Output impedance values of the external circuit of 7 k
or lower are recommended.
When capacitors are connected to external pins, the capacitance of several thousand times the internal capacitor
value is recommended to minimized the effect of voltage distribution between the external capacitor and internal
capacitor.
When the output impedance of the external circuit is too high, the sampling time for analog voltages may not be
sufficient (sampling time = 3.75
μ
s @machine clock of 16 MHz).
Error
The smaller the | AVRH – AVRL |, the greater the error would become relatively.
Linearity error
N + 1
3FF
3FE
3FD
004
003
002
001
Analog input
AVRL
AVRH
Analog input
AVRL
AVRH
Actual conversion
characteristics
V
OT
(Measured value)
V
(Measured value)
Actual conversion
characteristics
{
1 LSB
×
(N – 1)
+ V
OT
’}
V
NT
Theoretical
characteristics
D
D
Differential linearity error
Theoretical
characteristics
V
(N + 1)T
(Measured value)
Actual conversion
characteristics
V
NT
(Measured value)
Actual conversion
characteristics
Linearity error of
digital output N
V
OT:
Voltage at transition of digital output from “000
H
” to “001
H
V
FST
:Voltage at transition of digital output from “3FE
H
” to “3FF
H
[LSB]
V
NT
– {1 LSB
×
(N – 1) + V
OT
}
1 LSB’
=
[V]
AVRH – AVRL
1022
=
1 LSB
– 1 LSB [LSB]
V
(N + 1)T
– V
NT
1 LSB’
=
Differential linearity error
of digital output N
N – 2
N – 1
N
Block diagram of analog input circuit model
Note : Listed values must be considered as standards.
Comparator
Sample hold circuit
Analog input
R
ON1
: Approx. 1.5 k
(V
CC
= 5.0 V)
R
ON2
: Approx. 0.5 k
(V
CC
= 5.0 V)
R
ON3
: Approx. 0.5 k
(V
CC
= 5.0 V) C
0
: Approx. 60 pF
R
ON4
: Approx. 0.5 k
(V
CC
= 5.0 V) C
1
: Approx. 4 pF
R
ON1
R
ON2
R
ON3
R
ON4
C
0
C
1
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