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參數(shù)資料
| 型號： | MBM29LV016T-80PTR |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 16M (2M x 8) BIT |
| 中文描述： | 2M X 8 FLASH 3V PROM, 80 ns, PDSO40 |
| 封裝： | PLASTIC, REVERSE, TSOP1-40 |
| 文件頁數(shù)： | 15/52頁 |
| 文件大小： | 600K |
| 代理商： | MBM29LV016T-80PTR |
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15
MBM29LV016T
-80/-90/-12
/MBM29LV016B
-80/-90/-12
Notes:
1. Address bits A
11
to A
20
= X = “H” or “L” for all address commands except or Program Address (PA) and
Sector Address (SA).
2. Bus operations are defined in Table 2.
3. RA =Address of the memory location to be read.
PA =Address of the memory location to be programmed. Addresses are latched on the falling edge of
the WE pulse.
SA =Address of the sector to be erased. The combination of A
20
, A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, and A
13
will
uniquely select any sector.
4. RD =Data read from location RA during read operation.
PD =Data to be programmed at location PA. Data is latched on the rising edge of WE.
5. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Command Definitions
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the devices to
read mode. Table 6 defines the valid register command sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the sector Erase operation is in progress. Moreover, both
Read/Reset commands are functionally equivalent, resetting the device to the read mode. Please note that
commands are always written at DQ
0
to DQ
7
bits are ignored.
Table 6 MBM29LV016T/B Standard Command Definitions
Command
Sequence
(Notes 1, 2, 3)
Bus
Write
Cycles
Req'd
First Bus
Write Cycle
Second
Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read/Reset
(Note 5)
Read/Reset
(Note 5)
1
XXXH F0H
—
—
—
—
—
—
—
—
—
—
3
555H AAH 2AAH 55H
555H
F0H
RA
RD
—
—
—
—
Autoselect
3
555H AAH 2AAH 55H
555H
90H
—
—
—
—
—
—
Byte Program
(Notes 3, 4)
4
555H AAH 2AAH 55H
555H
A0H
PA
PD
—
—
—
—
Chip Erase
6
555H AAH 2AAH 55H
555H
80H
555H AAH 2AAH 55H
555H
10H
Sector Erase
(Note 3)
Sector Erase
Suspend
Sector Erase
Resume
6
555H AAH 2AAH 55H
555H
80H
555H AAH 2AAH 55H
SA
30H
1
XXXH B0H
—
—
—
—
—
—
—
—
—
—
1
XXXH 30H
—
—
—
—
—
—
—
—
—
—
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29LV016T-90PTN | 16M (2M x 8) BIT |
| MBM29LV016T-90PTR | 16M (2M x 8) BIT |
| MBM29LV017 | Full bridge driver IC |
| MBM29LV017-12 | 16M (2M X 8) BIT |
| MBM29LV017-12PBT | Circular Connector; No. of Contacts:41; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:22-41 RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29LV016T-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M x 8) BIT |
| MBM29LV016T-90PTN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M x 8) BIT |
| MBM29LV016T-90PTN# | 制造商:FUJITSU 功能描述: |
| MBM29LV016T-90PTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M x 8) BIT |
| MBM29LV017 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8) BIT |
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