參數(shù)資料
型號: MBM29LV002T
廠商: Fujitsu Limited
英文描述: CMOS 2M (256K ×8) Flash Memory(CMOS 2M(256K ×8)位 單5V 電源電壓閃速存儲器)
中文描述: 200萬的CMOS(256K × 8)快閃記憶體(200萬的CMOS(256K × 8)位單5V的電源電壓閃速存儲器)
文件頁數(shù): 12/45頁
文件大?。?/td> 279K
代理商: MBM29LV002T
12
MBM29LV002T/MBM29LV002B
Notes:
1. Address bits A
15
to A
17
= X = “H” or “L” for all address commands except for Program Address (PA) and
Sector Address (SA).
2. Bus operations are defined in Table 2.
3. RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of
the WE pulse.
SA = Address of the sector to be erased. The combination of A
17
, A
16
, A
15
, A
14
, and A
13
will uniquely
select any sector.
4. RD =Data read from location RA during read operation.
PD = Data to be programmed at location PA.
5. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Command Definitions
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the devices to
read mode. Table 6 defines the valid register command sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the sector Erase operation is in progress. Moreover, both
Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Read/Reset Command
The read or reset operation is initiated by writing the Read/Reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until the
command register contents are altered.
The devices will automatically power-up in the read/reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing parameters.
Autoselect Command
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the device resides in the target system. PROM
programmers typically access the signature codes by raising A
9
to a high voltage. However, multiplexing high
voltage onto the address lines is not generally desired system design practice.
Table 6 MBM29LV002T/B Command Definitions
Command
Sequence
Bus
Write
Cycles
Req’d
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr.
Data
Addr.
Data
Addr.
Data
Addr.
Data
Addr.
Data
Addr.
Data
Read/Reset
1
XXXH
F0H
Read/Reset
3
5555H
AAH 2AAAH 55H
5555H
F0H
RA
RD
Autoselect
3
5555H
AAH 2AAAH 55H
5555H
90H
Byte Program
4
5555H
AAH 2AAAH 55H
5555H
A0H
PA
PD
Chip Erase
6
5555H
AAH 2AAAH 55H
5555H
80H
5555H
AAH 2AAAH 55H
5555H
10H
Sector Erase
6
5555H
AAH 2AAAH 55H
5555H
80H
5555H
AAH 2AAAH 55H
SA
30H
Sector Erase Suspend
Erase can be suspended during sector erase with Addr (“H” or “L”). Data (B0H)
Sector Erase Resume
Erase can be resumed after suspend with Addr (“H” or “L”). Data (30H)
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