參數(shù)資料
型號： MB95F378LPMC2-G-SNE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 59/76頁
文件大?。?/td> 2597K
代理商： MB95F378LPMC2-G-SNE2
MB95310L/370L Series
62
DS07-12628-1E
(VCC = 3.0 V
±10%, AVSS = VSS = 0.0 V, TA = 40°C to +85°C)
(Continued)
Parameter Symbol Pin name Conditions
Value*2
Unit
Remarks
Min
Max
SCL clock
“L” width
tLOW
SCL0
R = 1.7 k
Ω,
C = 50 pF*1
(2
+ nm / 2) tMCLK 20
—
ns Master mode
SCL clock
“H” width
tHIGH
SCL0
(nm / 2)tMCLK
20
(nm / 2)tMCLK
+ 20
ns Master mode
Start
condition
hold time
tHD;STA
SCL0,
SDA0
(
1 + nm / 2) tMCLK 20 (1 + nm)tMCLK + 20
ns
Master mode
Maximum
value is
applied when
m, n = 1, 8.
Otherwise,
the minimum
value is
applied.
Stop
condition
setup time
tSU;STO
SCL0,
SDA0
(1
+ nm / 2) tMCLK 20 (1 + nm / 2)tMCLK + 20 ns Master mode
Start
condition
setup time
tSU;STA
SCL0,
SDA0
(1
+ nm / 2)tMCLK 20 (1 + nm / 2)tMCLK + 20 ns Master mode
Bus free time
between
stop
condition
and start
condition
tBUF
SCL0,
SDA0
(2 nm
+ 4)tMCLK 20
—ns
Data hold
time
tHD;DAT
SCL0,
SDA0
3 tMCLK
20
—
ns Master mode
Data setup
time
tSU;DAT
SCL0,
SDA0
(
2 + nm / 2)tMCLK 20 (1 + nm / 2)tMCLK + 20 ns
Master mode
When
assuming that
“L” of SCL is
not extended,
the minimum
value is
applied to first
bit of
continuous
data.
Otherwise,
the maximum
value is
applied.
相關(guān)PDF資料
PDF描述
MB95F376EPMC1-G-SNE2 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP64
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