- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45196 > MB95F136TWPFV (FUJITSU LTD) 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PDSO28 PDF資料下載
參數(shù)資料
| 型號(hào)： | MB95F136TWPFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | 8.60 X 17.75 MM, 2.80 MM HEIGHT, 1.27 MM PITCH, PLASTIC, SOP-28 |
| 文件頁數(shù)： | 9/55頁 |
| 文件大小： | 639K |
| 代理商： | MB95F136TWPFV |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
MB95130H Series
17
The RP indicates the address of the register bank currently being used. The relationship between the content
of RP and the real address conforms to the conversion rule illustrated below:
The DP specifies the area for mapping instructions (16 different types of instructions such as MOV A and dir)
using direct addresses to 0080H to 00FFH.
The CCR consists of the bits indicating arithmetic operation results or transfer data content and the bits that
control CPU operations at interrupt.
Direct bank pointer (DP2 to DP0)
Specified address area
Mapping area
XXXB (no effect to mapping)
0000H to 007FH
0000H to 007FH (without mapping)
000B (initial value)
0080H to 00FFH
0080H to 00FFH (without mapping)
001B
0100H to 017FH
010B
0180H to 01FFH
011B
0200H to 027FH
100B
0280H to 02FFH
101B
0300H to 037FH
110B
0380H to 03FFH
111B
0400H to 047FH
H flag
: Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation.
Cleared to “0” otherwise. This flag is for decimal adjustment instructions.
I flag
: Interrupt is enabled when this flag is set to “1”. Interrupt is disabled when this flag is set to “0”.
The flag is cleared to “0” when reset.
IL1, IL0 : Indicates the level of the interrupt currently enabled. Processes an interrupt only if its request level
is higher than the value indicated by these bits.
IL1
IL0
Interrupt level
Priority
00
0
High
Low = no interruption
01
1
10
2
11
3
N flag
: Set to “1” if the MSB is set to “1” as the result of an arithmetic operation. Cleared to “0” when the
bit is set to “0”.
Z flag
:
Set to “1” when an arithmetic operation results in “0”. Cleared to “0” otherwise.
V flag
: Set to “1” if the complement on 2 overflows as a result of an arithmetic operation. Cleared to “0”
otherwise.
C flag
: Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared
to “0” otherwise. Set to the shift-out value in the case of a shift instruction.
"0"
"1"
R4
R3
R2
R1
R0
b2
b1
b0
A7
A6
A5
A4
A3
A2
A1
A0
A15 A14 A13 A12 A11 A10
A9
A8
Rule for Conversion of Actual Addresses in the General-purpose Register Area
Generated address
RP upper
OP code lower
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB95F136HSPFV | 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PDSO28 |
| MB95F156HPMT | 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP48 |
| MB95F156TPMC | 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP52 |
| MB95F156MPMC | 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP52 |
| MB95F156NPMC | 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP52 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB95F146S | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontrollers |
| MB95F146SPFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontrollers |
| MB95F146W | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontrollers |
| MB95F146WPFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontrollers |
| MB95F156J | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。