參數(shù)資料
型號(hào): MB95F118BWPMC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PQFP52
封裝: 10 X 10 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁數(shù): 49/68頁
文件大?。?/td> 2637K
代理商: MB95F118BWPMC
MB95110B Series
DS07-12615-3E
53
Sampling at the falling edge of sampling clock*1 and enabled serial clock delay*2
(ESCR register : SCES bit
= 1, ECCR register : SCDE bit = 1)
(VCC
= 3.3 V, AVSS = VSS = 0.0 V, TA = 40 °C to + 85 °C)
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
serial clock.
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for tMCLK.
Parameter
Sym-
bol
Pin name
Conditions
Value
Unit
Min
Max
Serial clock cycle time
tSCYC
SCK
Internal clock
operating output pin :
CL
= 80 pF + 1 TTL
5 tMCLK*3
ns
SCK
↓→SOT hold time
tSLOVI
SCK, SOT
95
+ 95
ns
Valid SIN
→SCK↑
tIVSHI
SCK, SIN
tMCLK*3
+ 190
ns
SCK
↑ → valid SIN hold time
tSHIXI
SCK, SIN
0
ns
SOT
→SCK↑ delay time
tSOVHI
SCK, SOT
4 tMCLK*3
ns
SCK
SOT
SIN
2.4 V
0.8 V
tSLOVI
2.4 V
0.8 V
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
2.4 V
0.8 V
tSCYC
tSOVHI
tIVSHI
tSHIXI
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