參數(shù)資料
型號: MB95116APMC
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP52
封裝: 10 X 10 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁數(shù): 23/71頁
文件大?。?/td> 814K
代理商: MB95116APMC
MB95110A Series
3
■ PRODUCT LINEUP
(Continued)
Part number
Parameter
MB95116A
MB95F118AS
MB95F118AW
Type
MASK ROM product
Flash memory product
ROM capacity
32 Kbytes
60 Kbytes
RAM capacity
1 Kbyte
2 Kbytes
Reset output
No
Option*
1
Clock system
Selectable
single/dual clock*2
Single clock
Dual clock
Low voltage
detection reset
No
CPU functions
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time
: 0.1
s (at machine clock frequency 10 MHz)
Interrupt processing time
: 0.9
s (at machine clock frequency 10 MHz)
General-purpose I/O
port
Single clock product : 39 ports (N-ch open drain : 2 ports, CMOS : 37 ports)
Dual clock product : 37 ports (N-ch open drain : 2 ports, CMOS : 35 ports)
Timebase timer
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Reset generated cycle
At main oscillation clock 10 MHz
: Minimum 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Minimum 250 ms
Wild register
Capable of replacing 3 bytes of ROM data
I2C
Master/slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
Data transfer capable in UART/SIO
Full duplex double buffer, variable data length (5/6/7/8-bit), built-in baud rate genera-
tor
Transfer rate : 2400 bps to 1250000 bps (at machine clock 10 MHz)
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock synchronous (SIO) or clock asynchronous (UART) serial data transfer capable
LIN-UART
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Capable of serial data transfer synchronous or asynchronous to clock signal.
LIN functions available as the LIN master or LIN slave.
8/10-bit A/D convert-
er(8 channels)
8-bit or 10-bit resolution can be selected.
Peripheral
functions
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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