參數(shù)資料
型號(hào)： MB91F367GA
廠商： Fujitsu Limited
元件分類： 微控制器
英文描述： 32-BIT MICROCONTROLLER
中文描述： 32位微控制器
文件頁數(shù)： 23/62頁
文件大小： 713K
代理商： MB91F367GA
FME / EMDC / Br+JR - mb91f367g_f368g_ds.fm 23
10-Apr-01
2.1.3 Flash Wait Control Register (FMWT)
Bit 6: This bit is reserved, always set this bit to "0" when writing to this register.
Bits 5,4: These bits control the length of the high pulse for the ATDIN signal
Bit 3: EQINH: This bit controls the falling edge of the EQIN signal.
0: falling edge of EQIN at falling edge of FWAITR;
1: falling edge of EQIN half cycle after falling edge of FWAITR;
Bit 2,1,0: WTC2,1,0: Wait Cycle bits
WTC2-0 are used to insert auto wait cycles for flash memory access.
address
bit 7
bit6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0000700
4
H
----
----
FAC1
FAC0
EQINH
WTC2
WTC1
WTC0
access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
initial
value
0
0
0
0
0
1
1
value
after
Boot
ROM
0
0
1
0
0
1
1
FAC1
FAC0
length of high pulse for ATDIN
0
0
0.5 cycles of CLKB
0
1
1 cycle of CLKB
1
0
1.5 cycles of CLKB
1
1
2 cycles of CLKB
WTC2
WTC1
WTC0
wait cycles
0
0
0
0
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
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