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MB91310 Series
3
UART
Full duplex double buffer
UART : 5 channels
With parity / no parity selection
Asynchronous (start - stop synchronized) or CLK - synchronous communications selectable
Internal timer for dedicated baud rate
External clock can be used as transfer clock
Assorted error detection functions (for parity, frame, and overrun errors)
I
2
C Interface
Four channels are incorporated. (ch3 can be used as two ports.)
Interrupt controller
A total of five external interrupt lines are provided (1 nonmaskable interrupt pin (NMI) and 4 normal interrupt
pins (INT3 to INT0).
Interrupt from internal peripheral devices.
Programmable priorities (16 levels) for all interrupts except the non - maskable interrupt
Available for wakeup from STOP mode
A/D converter
10-bit resolution. 10 channels
Successive comparator type, conversion time : approx. 10
μ
s
Conversion modes (Single conversion mode, Scan conversion mode)
Startup sources (software and external triggers)
PPG
4 channels
Six-bit down-counter, 16-bit data register with cycle setting buffer
The internal clock is optional from 1/4/16/64 en surroundings.
PWC
One channel (input) incorporated
16 bits up counter
Simple LFP digital filter incorporated
Timer
Lowpass filter eliminating noise below the clock setting
Capable of pulse width measurement according to fine settings using seven types of clock signals
Event count function based on pin input
Interval timer function using seven different clocks and one external input clock
(Continued)
Master/slave sending and receiving
Arbitration function
Clock synchronization function
Slave address and general call address detection function
Detecting transmitting direction function
Start condition repeat generation and detection function
Bus error detection function
10 bit/7 bit slave address
Standard mode (Max 100 Kbps)/High speed mode (Max 400 Kbps) supported