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參數資料
| 型號： | MB91F267PFM-G |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數： | 9/53頁 |
| 文件大?。?/td> | 592K |
| 代理商： | MB91F267PFM-G |
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MB91265 Series
17
Clock control block
Take the oscillation stabilization wait time during “L” level input to the INIT pin.
Switch shared port function
To switch between the use as a port and the use as a dedicated pin, use the port function register (PFR).
Low-power Consumption Mode
(1) To enter the standby mode, use the synchronous standby mode (set with the SYNCS bit as bit 8 in the TBCR:
or time-base counter control register) and be sure to use the following sequence
In addition, please set I flag, ILM, and ICR to diverge to the interruption handler that is the return factor after
the standby returns.
(2) Please do not do the following when the monitor debugger is used.
Break point setting for above instruction lines
Step execution for above instruction lines
Notes on the PS register
As the PS register is processed by some instructions in advance, exception handling below may cause the
interrupt handling routine to break when the debugger is used or the display contents of flags in the PS register
to be updated.
As the microcontroller is designed to carry out reprocessing correctly upon returning from such an EIT event, it
performs operations before and after the EIT as specified in either case.
1. The following operations are performed when the instruction followed by a DIV0U/DIV0S instruction results
in : (a) acceptance of a user interrupt or NMI, (b) step execution, or (c) a break at a data event or emulator menu.
(1) The D0 and D1 flags are updated in advance.
(2) An EIT handling routine (user interrupt, NMI, or emulator) is executed.
(3) Upon returning from the EIT, the DIV0U/DIV0S instruction is executed and the D0 and D1 flags are
updated to the same values as in (1).
2. The following operations are performed when the ORCCR/STILM/MOV Ri and PS instructions are executed
to enable interruptions when a user interrupt or NMI trigger even has occurred.
(1) The PS register is updated in advance.
(2) An EIT handling routine (user interrupt, NMI) is executed.
(3) Upon returning from the EIT, the above instructions are executed and the PS register is updated to the
same value as in (1).
(LDI
#value_of_standby, R0)
: value_of standby is write data to STCR.
(LDI
#_STCR, R12)
: _STCR is address (481H) of STCR.
STB
R0, @R12
: Writing to standby control register (STCR)
LDUB
@R12, R0
: STCR read for synchronous standby
LDUB
@R12, R0
: Dummy re-read of STCR
NOP
: NOP
× 5 for arrangement of timing
NOP
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MB91F267PMC-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267PMC-GE1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267PMC-GS | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F267PMC-GSE1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F272SPFV-GSE1 | 制造商:FUJITSU 功能描述:32BIT MCU CAN 5V SMD LQFP100 |
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