參數資料
型號: MB91F191APFF
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-bit Proprietary Microcontroller
中文描述: 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁數: 20/33頁
文件大小: 435K
代理商: MB91F191APFF
MB
91191/192 Series
20
The figure below shows the relationship between the X0 input and the internal clock based on the GCR (Gear
Control Register) , CHC, CCK1, and CCK0 bit settings.
Where t
CYCH
is the H level width of the internal clock and t
CYCL
is the L level width.
For example, when set to source oscillation
×
1/2, gear
×
1/4 and X0 input frequency
=
20 MHz : t
CYC
=
400 ns,
t
CYCH
=
350 ns, t
CYCL
=
50 ns
CCK1/0:11
X0 input
Source oscillation
×
1
(CHC bit in GCR
=
0)
(a) gear
×
1
CCK1/0:00
Internal clock
t
CYC
t
CYC
t
CYC
t
CYC
t
CYC
t
CYC
t
CYC
t
CYC
(b) gear
×
1/2
Internal clock
Internal clock
Internal clock
CCK1/0:01
(c) gear
×
1/4
Internal clock
CCK1/0:10
(d) gear
×
1/8
CCK1/0:11
Source oscillation
×
1/2
(CHC bit in GCR
=
1)
(a) gear x 1
CCK1/0:00
Internal clock
(b) gear x 1/2
CCK1/0:01
(c) gear x 1/4
Internal clock
CCK1/0:10
(d) gear x 1/8
Internal clock
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