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參數(shù)資料
| 型號： | MB91233LPFF-G-XXX-BNDE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-bit Microcontroller |
| 中文描述： | 32-BIT, MROM, 33.6 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁數(shù)： | 2/66頁 |
| 文件大?。?/td> | 861K |
| 代理商： | MB91233LPFF-G-XXX-BNDE1 |
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MB91230 Series
2
(Continued)
Memory-to-memory transfer, bit handling, and barrel shift instructions, etc. : Instructions suitable for embedded
applications
Function entry/exit instructions, multiple-register load/store instructions : Instructions adapted for C-language
Register interlock function : Facilitates coding in assembler
Built-in multiplier with instruction-level support
- 32-bit multiplication with sign : 5 cycles
- 16-bit multiplication with sign : 3 cycles
Interrupt (PC and PS save) : 6 cycles (16 priority levels)
Harvard architecture allowing program access and data access to be executed simultaneously
Instruction compatible with FR family
Capacity of built-in ROM and ROM type
- MASK ROM
: 256 KB
- FLASH ROM
: 256 KB
Capacity of built-in RAM : 16 KB
General-purpose ports : Maximum 98 ports (including N-ch open-drain port : 4 ports)
A/D converter (series-parallel type)
- Resolution : 10-bit : 8 ch (4 ch
×
2 unit)
- Conversion time : 1.69
μ
s (Minimum conversion time)
D/A converter (R-2R type)
- Resolution : 8-bit : 2 ch (independence)
- Conversion speed : 0.6
μ
s (when load capacitance 20 pF)
External interrupt input : 16 ch
Bit search module (for REALOS)
- Function for searching the MSB (Upper bit) in each word for the first “0” or “1” inverted point
UART (full-duplex double buffer) : 4 ch
- Selectable parity On/Off
- Asynchronous (start-stop synchronized) or clock-synchronous communications selectable
- Internal timer for dedicated baud rate (U-timer) on each channel
- External clock can be used as transfer clock
- Error detection function for parity, frame and overrun
PPG : 16-bit
×
6 ch
Up/down counter : 2 ch (8-bit
×
2 ch or 16-bit
×
1 ch)
Reload timer : 16-bit
×
4 ch
Free-run timer : 16-bit
×
2 ch
Watch timer : 15-bit
×
1 ch
PWC : 8-bit
×
2 ch
Input capture : 2 ch (interface with free-run timer 0)
Output compare : 4 ch (free-run timer 0 and output compare unit 0/1 cooperate, free-run timer 1 and
output compare units 2/3)
LCD controller : SEG00 to SEG31/COM0 to COM3 (also serving as a port)
Clock monitor (peripheral clock output function) : 1 ch
Timebase/watchdog timer (26-bit)
Real-time clock (counting even with the real-time clock stopped)
Low Power Consumption Mode
Sleep/stop function
Package : LQFP-120, FLGA-128
Technology : CMOS 0.35
μ
m
Power supply
Dual power supply configuration [internal logic 3.3 V, I/O 5.5 V(3.3 V for ADC and DAC input/output)]
Note : Do not set the external bus mode in which the MB91230 series cannot operate.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB91243PFV-GS-102-BNDE1 | 制造商:FUJITSU 功能描述:ELECTRONIC COMPONENT |
| MB91245 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91245_07 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91245S | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91247 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
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