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參數(shù)資料
| 型號(hào)： | MB90V670 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 44/124頁(yè) |
| 文件大?。?/td> | 2584K |
| 代理商： | MB90V670 |
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MB90670/675 Series
44
(Continued)
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bit 7
. . . . . . . . . . . .
bit 7
. . . . . . . . . . . .
bit 7
. . . . . . . . . . . .
bit 7
. . . . . . . . . . . .
. . . . . . . . . . . .
Note:
Only MB90675 series has P81 through P86, P90, PA0 through PA7, and PB0 through PB2, and MB90670 series does not
have such pins.
bit-15
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
P07
P06
P05
P04
P03
P02
P01
P00
Port 0 data direction register
(DDR0)
Address
000010
H
(DDR1)
P17
P16
P15
P14
P13
P12
P11
P10
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(DDR0)
Port 1 data direction register
(DDR1)
Address
000011
H
(DDR3)
bit 15
bit 8 bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
P27
P26
P25
P24
P23
P22
P21
P20
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 2 data direction register
(DDR2)
Address
000012
H
P37
P36
P35
P34
P33
P32
P31
P30
(DDR2)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 0
Port 3 data direction register
(DDR3)
Address
000013
H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(ADER)
bit 15
bit 8 bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
P47
P46
P45
P44
P43
P42
P41
P40
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 4 data direction register
(DDR4)
Address
000014
H
(DDR4)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 0
P57
P56
P55
P54
P53
P52
P51
P50
Analog input enable register
(ADER)
Address
000015
H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(DDR7)
bit 15
bit 8 bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
P67
P66
P65
P64
P63
P62
P61
P60
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 6 data direction register
(DDR6)
Address
000016
H
(DDR6)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 0
P77
P76
P75
P74
P73
P72
P71
P70
Port 7 data direction register
(DDR7)
Address
000017
H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(Vacancy)
bit 15
bit 8 bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
—
P86
P85
P84
P83
P82
P81
P80
R/W
R/W
bit 6
R/W
bit 5
R/W
bit 4
R/W
bit 3
R/W
bit 2
R/W
bit 1
R/W
bit 0
Port 8 data direction register
(DDR8)
Address
000018
H
bit 15
bit 8 bit 7
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
R/W
bit 12
R/W
bit 11
R/W
bit 10
R/W
bit 9
R/W
bit 8
R/W
bit 7
R/W
R/W
bit 0
Port A data direction register
(DDRA)
Address
00001A
H
(DDRB)
(DDRA)
bit 15
bit 14
bit 13
—
—
—
—
—
PB2
PB1
PB0
Port B data direction register
(DDRB)
Address
00001B
H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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