![](http://datasheet.mmic.net.cn/330000/MB90F598_datasheet_16438024/MB90F598_20.png)
MB90595/595G Series
20
(Continued)
Address
Register
Abbreviation Access
Peripheral
Initial value
6F
H
ROM Mirror Function Selection Register
ROMM
R/W
ROM Mirror
_ _ _ _ _ _ _ 1
B
70
H
PWM1 Compare Register 0
PWC10
R/W
Stepping Motor
Controller 0
XXXXXXXX
B
71
H
PWM2 Compare Register 0
PWC20
R/W
XXXXXXXX
B
72
H
PWM1 Select Register 0
PWS10
R/W
_ _ 0 0 0 0 0 0
B
73
H
PWM2 Select Register 0
PWS20
R/W
_ 0 0 0 0 0 0 0
B
74
H
PWM1 Compare Register 1
PWC11
R/W
Stepping Motor
Controller 1
XXXXXXXX
B
75
H
PWM2 Compare Register 1
PWC21
R/W
XXXXXXXX
B
76
H
PWM1 Select Register 1
PWS11
R/W
_ _ 0 0 0 0 0 0
B
77
H
PWM2 Select Register 1
PWS21
R/W
_ 0 0 0 0 0 0 0
B
78
H
PWM1 Compare Register 2
PWC12
R/W
Stepping Motor
Controller 2
XXXXXXXX
B
79
H
PWM2 Compare Register 2
PWC22
R/W
XXXXXXXX
B
7A
H
PWM1 Select Register 2
PWS12
R/W
_ _ 0 0 0 0 0 0
B
7B
H
PWM2 Select Register 2
PWS22
R/W
_ 0 0 0 0 0 0 0
B
7C
H
PWM1 Compare Register 3
PWC13
R/W
Stepping Motor
Controller 3
XXXXXXXX
B
7D
H
PWM2 Compare Register 3
PWC23
R/W
XXXXXXXX
B
7E
H
PWM1 Select Register 3
PWS13
R/W
_ _ 0 0 0 0 0 0
B
7F
H
PWM2 Select Register 3
PWS23
R/W
_ 0 0 0 0 0 0 0
B
80
H
to 8F
H
CAN Controller. Refer to section about CAN Controller
90
H
to 9D
H
Reserved
9E
H
Program Address Detection Control
Status Register
PACSR
R/W
Address Match
Detection Function
0 0 0 0 0 0 0 0
B
9F
H
Delayed Interrupt/Request Register
DIRR
R/W
Delayed Interrupt _ _ _ _ _ _ _ 0
B
A0
H
Low-Power Mode Control Register
LPMCR
R/W
Low Power
Controller
0 0 0 1 1 0 0 0
B
A1
H
Clock Selection Register
CKSCR
R/W
Low Power
Controller
1 1 1 1 1 1 0 0
B
A2
H
to A7
H
Reserved
A8
H
Watchdog Timer Control Register
WDTC
R/W
Watchdog Timer
XXXXX 1 1 1
B
A9
H
Time Base Timer Control Register
TBTC
R/W
Time Base Timer 1 _ _ 0 0 1 0 0
B
AA
H
to AD
H
Reserved
AE
H
Flash Memory Control Status Register
(MB90F598/F598G only.
Otherwise reserved)
FMCS
R/W
Flash Memory
0 0 0 X 0 0 0 0
B
AF
H
Reserved