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參數(shù)資料
| 型號： | MB90V580B |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 75/124頁 |
| 文件大小： | 2638K |
| 代理商： | MB90V580B |
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MB90580B Series
75
21. Low-Power Consumption Control Circuit
The operation modes of the MB90580B series are the PLL clock, PLL sleep, watch, main clock, main sleep,
stop, and hardware standby modes. The operation modes excluding the PLL clock mode are classified as low-
power consumption modes.
The low power consumption circuit has the following functions.
Main clock mode/Main sleep mode
In either mode, the microcontroller operates only with the main clock (OSC oscillation clock), using the main
clock as the operating clock while suspending the PLL clock (VCO oscillation clock).
PLL sleep mode/Main sleep mode
These modes stop only the operation clock of the CPU, leaving the other clocks active.
Watch mode
The watch mode allows only the time-base timer to operate.
Stop mode/Hardware standby mode
These modes stop oscillation while retaining data at the lowest power consumption. The CPU intermittent
operation function causes the clock supplied to the CPU to operate intermittently when the CPU accesses a
register, internal memory, internal resource, or external bus. This function saves power consumption by
decreasing the execution speed of the CPU while providing high-speed clock signals to the internal resources.
The PLL clock multiplication factor can be selected from among 1, 2, 3, and 4 using the CS1 and CS0 bits in
the clock selection register.
The WS1 and WS0 bits can be used to set the oscillation settling time for the main clock, which is taken to
wake up from the stop or hardware standby mode.
(1) Register configuration
Low-power consumption mode control register
bit
7
6
5
4
3
2
1
0
Address
: 0000A0
H
STP
(W) (W) (R/W) (W) (
) (R/W) (R/W) (
)
(0)
(0)
(0)
(1)
SLP
SPL RST TMD CG1 CG0
LPMCR
Access
Initial value
(1)
(0)
(0) (
)
Clock selection register
bit
15
SCM MCM WS1 WS0 SCS MCS CS1 CS0
(R) (R) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(1)
(1)
(1)
(1)
14
13
12
11
10
9
8
Address
: 0000A1
H
CKSCR
Access
Initial value
(1)
(1)
(0)
(0)
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