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參數(shù)資料
| 型號(hào)： | MB90P641A |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 31/96頁(yè) |
| 文件大小： | 1569K |
| 代理商： | MB90P641A |
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31
MB90640A Series
(3) Port Pin Allocation
Ports 1, 4, and 5 on the MB90640A series share pins with the external bus. The pin functions are determined
by the bus mode and register settings.
Notes: The upper address, WRL, WRH, HAK, HRQ, RDY, and CLK can be set for use as ports by function selection.
The pins mentioned above can be used as a port in single-chip mode.
Pin name
Function
Non-multiplex mode
Multiplex mode
External address control
External address control
Enable (address)
Disable (port)
Enable (address)
Disable (port)
External bus width
External bus width
External bus width
External bus width
8 bits
16 bits
8 bits
16 bits
8 bits
16 bits
8 bits
16 bits
D07 to D00/
AD07 to AD00
D07 to D00
AD07 to AD00
P17 to P10/
D15 to D08/
AD15 to AD08
Port
D15 to D08
Port
D15 to D08
A15 to A08
AD15 to AD08
A15 to A08
AD15 to AD08
P27 to P20/
A07 to A00
A07 to A00
Port
P37 to P30/
A15 to A08
A15 to A08
P47 to P40/
A23 to A16
A23 to A16
Port
A23 to A16
Port
P57/ALE
ALE
ALE
RD
RD
RD
P55/WRL
WRL
WRL
P54/WRH
Port
WRH
Port
WRH
Port
WRH
Port
WRH
P53/HRQ
HRQ
HRQ
P52/HAK
HAK
HAK
P51/RDY
RDY
RDY
P50/CLK
CLK
CLK
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